llvm-6502/test/CodeGen
2014-05-08 07:38:13 +00:00
..
AArch64 AArch64/ARM64: optimise vector selects & enable test 2014-05-07 14:10:27 +00:00
ARM Allow using normal .eh_frame based unwinding on ARM. Use the same 2014-05-07 07:49:34 +00:00
ARM64 AArch64/ARM64: Port NEON post-increment load/store with 2/3/4 vectors to ARM64 backend. 2014-05-08 07:38:13 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600
SPARC
SystemZ
Thumb
Thumb2
X86 Lower certain build_vectors to insertps instructions 2014-05-08 00:25:16 +00:00
XCore