llvm-6502/test/CodeGen
2010-08-11 17:39:23 +00:00
..
Alpha
ARM Consider this code snippet: 2010-08-11 08:43:16 +00:00
Blackfin
CBackend
CellSPU Have SPU handle halfvec stores aligned by 8 bytes. 2010-08-09 16:33:00 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PIC16
PowerPC
SPARC
SystemZ
Thumb Fix test and re-enable it. 2010-08-11 17:25:51 +00:00
Thumb2 fix silly typo 2010-08-11 17:32:46 +00:00
X86 Reapply r109881 using a more strict command line for llc. 2010-08-11 17:39:23 +00:00
XCore