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1f42181f99
llvm-6502/lib/Target/Sparc
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Brian Gaeke 1f42181f99 Support binary operations with immediates for <= cInt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18756 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-10 08:39:28 +00:00
..
DelaySlotFiller.cpp Use TargetMachine::hasDelaySlot() instead of our old switch statement 2004-09-30 04:04:47 +00:00
FPMover.cpp When FpMOVDs appeared in pairs, we were mistakenly skipping over the latter of 2004-12-10 04:42:45 +00:00
Makefile Adjust paths: Sparc/V8 --> SparcV8 2004-12-10 04:48:57 +00:00
README.txt Update lists of failing benchmarks (except C++...something is the 2004-12-10 08:39:27 +00:00
Sparc.h Add createSparcV8FPMoverPass(). 2004-09-29 03:25:39 +00:00
Sparc.td Adjust paths: Sparc/V8 --> SparcV8 2004-12-10 04:48:57 +00:00
SparcAsmPrinter.cpp Fix asm-printing directives (how did we not see this before...apparently, 2004-12-09 18:51:01 +00:00
SparcInstrFormats.td Class F2_1 already inherits the imm22 field from class F2 2004-10-14 22:32:24 +00:00
SparcInstrInfo.cpp Recognize FpMOVD as a move. 2004-09-29 16:45:47 +00:00
SparcInstrInfo.h I think that V8 should coallesce registers, don't you? 2004-07-25 06:19:04 +00:00
SparcInstrInfo.td Add the rest of the logical instructions. 2004-11-23 06:39:37 +00:00
SparcRegisterInfo.cpp Remove dependency on MRegisterInfo::getRegClass 2004-10-29 21:42:27 +00:00
SparcRegisterInfo.h Code insertion methods now return void instead of an int. 2004-08-15 22:15:11 +00:00
SparcRegisterInfo.td Make this file self-contained. 2004-12-10 04:46:30 +00:00
SparcTargetMachine.cpp Bytes and shorts are aligned differently from words. 2004-12-09 18:51:02 +00:00
SparcTargetMachine.h Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the 2004-10-09 05:57:01 +00:00
SparcV8CodeEmitter.cpp This code rotted - change it to call abort() until someone wants 2004-12-03 06:57:14 +00:00
SparcV8ISelSimple.cpp Support binary operations with immediates for <= cInt. 2004-12-10 08:39:28 +00:00
SparcV8JITInfo.h SparcV8 skeleton 2004-02-25 19:28:19 +00:00

README.txt 

SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing an expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current expected test failures
------------------------------

The SparcV8 backend works on many simple C++ SingleSource codes. Here
are the known SingleSource failures:

	Regression/C++/EH/exception_spec_test
	Regression/C++/EH/throw_rethrow_test
	Benchmarks/Shootout-C++/moments
	Benchmarks/Shootout-C++/random

Here are the known MultiSource test failures, neglecting FreeBench,
MallocBench, and Prolangs-C++:

  Applications/lambda
  Applications/d/make_dparser
  Applications/hbd
  Applications/hexxagon
  Benchmarks/Fhourstones
  Benchmarks/McCat/03-testtrie
  Benchmarks/McCat/18-imp
  Benchmarks/Olden/tsp
  Benchmarks/Ptrdist/anagram
  Benchmarks/Prolangs-C/bison/mybison
  Benchmarks/Prolangs-C/fixoutput
  Benchmarks/Prolangs-C/gnugo
  Benchmarks/Prolangs-C/plot2fig

To-do
-----

* support shifts on longs
* support casting 64-bit integers to FP types
* support FP rem
* directly support select instructions

$Date$