llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 20:29:48 +00:00

History

Duncan Sands f9c98e650d The last pieces needed for loading arbitrary precision integers. This won't actually work (and most of the code is dead) unless the new legalization machinery is turned on. While there, I rationalized the handling of i1, and removed some bogus (and unused) sextload patterns. For i1, this could result in microscopically better code for some architectures (not X86). It might also result in worse code if annotating with AssertZExt nodes turns out to be more harmful than helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46280 91177308-0d34-0410-b5e6-96231b3b80d8		2008-01-23 20:39:46 +00:00
..
IA64.h	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64.td	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64AsmPrinter.cpp	Add new shorter predicates for testing machine operands for various types:	2007-12-30 23:10:15 +00:00
IA64Bundling.cpp	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64InstrBuilder.h	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64InstrFormats.td	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64InstrInfo.cpp	remove MachineOpCode typedef.	2008-01-07 02:48:55 +00:00
IA64InstrInfo.h	Move some more instruction creation methods from RegisterInfo into InstrInfo.	2008-01-01 21:11:32 +00:00
IA64InstrInfo.td	rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.	2008-01-06 23:38:27 +00:00
IA64ISelDAGToDAG.cpp	Rename SSARegMap -> MachineRegisterInfo in keeping with the idea	2007-12-31 04:13:23 +00:00
IA64ISelLowering.cpp	The last pieces needed for loading arbitrary	2008-01-23 20:39:46 +00:00
IA64ISelLowering.h	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64MachineFunctionInfo.h
IA64RegisterInfo.cpp	Move some more instruction creation methods from RegisterInfo into InstrInfo.	2008-01-01 21:11:32 +00:00
IA64RegisterInfo.h	Move some more functionality from MRegisterInfo to TargetInstrInfo.	2008-01-04 23:57:37 +00:00
IA64RegisterInfo.td	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64TargetAsmInfo.cpp	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64TargetAsmInfo.h	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64TargetMachine.cpp	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
IA64TargetMachine.h	Remove attribution from file headers, per discussion on llvmdev.	2007-12-29 20:36:04 +00:00
Makefile	remove attribution from lib Makefiles.	2007-12-29 20:09:26 +00:00
README	If a function is vararg, never pass inreg arguments in registers. Thanks to	2007-06-19 00:13:10 +00:00

README

*** README for the LLVM IA64 Backend "Version 0.01" - March 18, 2005
*** Quote for this version:

      "Kaori and Hitomi are naughty!!"


Congratulations, you have found:

**************************************************************** 
* @@@       @@@       @@@  @@@  @@@@@@@@@@                     *
* @@@       @@@       @@@  @@@  @@@@@@@@@@@                    *
* @@!       @@!       @@!  @@@  @@! @@! @@!                    *
* !@!       !@!       !@!  @!@  !@! !@! !@!                    *
* @!!       @!!       @!@  !@!  @!! !!@ @!@                    *
* !!!       !!!       !@!  !!!  !@!   ! !@!                    *
* !!:       !!:       :!:  !!:  !!:     !!:                    *
*  :!:       :!:       ::!!:!   :!:     :!:                    *
*  :: ::::   :: ::::    ::::    :::     ::                     *
* : :: : :  : :: : :     :       :      :                      *
*                                                              *
*                                                              *
*  @@@@@@   @@@  @@@       @@@   @@@@@@     @@@@@@       @@@   *
* @@@@@@@@  @@@@ @@@       @@@  @@@@@@@@   @@@@@@@      @@@@   *
* @@!  @@@  @@!@!@@@       @@!  @@!  @@@  !@@          @@!@!   *
* !@!  @!@  !@!!@!@!       !@!  !@!  @!@  !@!         !@!!@!   *
* @!@  !@!  @!@ !!@!       !!@  @!@!@!@!  !!@@!@!    @!! @!!   *
* !@!  !!!  !@!  !!!       !!!  !!!@!!!!  @!!@!!!!  !!!  !@!   *
* !!:  !!!  !!:  !!!       !!:  !!:  !!!  !:!  !:!  :!!:!:!!:  *
* :!:  !:!  :!:  !:!       :!:  :!:  !:!  :!:  !:!  !:::!!:::  *
* ::::: ::   ::   ::        ::  ::   :::  :::: :::       :::   *
*  : :  :   ::    :        :     :   : :   :: : :        :::   *
*                                                              *
****************************************************************
* Bow down, bow down, before the power of IA64! Or be crushed, *
* be crushed, by its jolly registers of doom!!                 *
****************************************************************

DEVELOPMENT PLAN:

   _  you are       2005           maybe 2005       2006            2006 and
  /   here            |               |              |               beyond 
 v                    v               v              v                |
                                                                      v
CLEAN UP        ADD INSTRUCTION      ADD          PLAY WITH
INSTRUCTION --> SCHEDULING AND  -->  JIT    -->    DYNAMIC     --> FUTURE WORK
SELECTION       BUNDLING            SUPPORT     REOPTIMIZATION

DISCLAIMER AND PROMISE:

As of the time of this release, you are probably better off using Intel C/C++
or GCC. The performance of the code emitted right now is, in a word,
terrible. Check back in a few months - the story will be different then,
I guarantee it.

TODO:

  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - write truly inspirational documentation
  - if-conversion (predicate database/knowledge? etc etc)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:

  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:

  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:

  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:

  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.