Benjamin Kramer 202be06318 X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. ... For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208788 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-14 16:14:45 +00:00
..
AArch64	TableGen: use PrintMethods to print more aliases	2014-05-12 18:04:06 +00:00
ARM	Regression test for ARM EHABI breakage in r208166.	2014-05-14 11:13:31 +00:00
ARM64	Folding into CSEL when there is ZEXT between SETCC and ADD	2014-05-13 00:40:58 +00:00
CPP
Generic	MC: move test from Generic to COFF	2014-04-23 21:41:07 +00:00
Hexagon
Inputs
Mips	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
MSP430	Mark FPB as a reserved register when needed.	2014-04-02 13:13:56 +00:00
NVPTX	Fix the test: DCE optimized away everything.	2014-04-21 17:23:12 +00:00
PowerPC	[PowerPC] Add global named register support	2014-05-11 19:29:11 +00:00
R600	R600/SI: Try to fix BFE operands when moving to VALU	2014-05-13 23:45:50 +00:00
SPARC	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Make this test not match its own filename, when being run from a path that includes the string 'add'.	2014-04-15 22:29:32 +00:00
Thumb2	Move the segmented stack switch to a function attribute	2014-04-10 22:58:43 +00:00
X86	X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test.	2014-05-14 16:14:45 +00:00
XCore	Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"	2014-04-21 17:57:07 +00:00