Richard Sandiford 204537e25e [SystemZ] Make more use of LTGFR ... InstCombine turns (sext (trunc)) into (ashr (shl)), then converts any comparison of the ashr against zero into a comparison of the shl against zero. This makes sense in itself, but we want to undo it for z, since the sign- extension instruction has a CC-setting form. I've included tests for both the original and InstCombined variants, but the former already worked. The patch fixes the latter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197234 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-13 15:07:39 +00:00
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AArch64	[AArch64] Removed unnecessary copy patterns with v1fx types.	2013-12-12 15:46:29 +00:00
ARM	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.	2013-12-11 03:32:44 +00:00
MSP430
NVPTX	[NVPTX] Fix off-by-one error when creating the VT list for an SDNode	2013-12-05 12:58:00 +00:00
PowerPC	PowerPC: add Linux triple to TLS tests	2013-12-12 11:51:23 +00:00
R600	R600/SI: Add i64 cmp tests	2013-12-10 21:11:55 +00:00
SPARC	[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.	2013-12-09 05:13:25 +00:00
SystemZ	[SystemZ] Make more use of LTGFR	2013-12-13 15:07:39 +00:00
Thumb	Use FileCheck and expand the test a bit.	2013-11-27 19:22:14 +00:00
Thumb2	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
X86	X86: When lowering shl_parts, don't emit shift amounts larger than the bit width.	2013-12-13 13:40:24 +00:00
XCore	XCore target: Make handling of large frames not dependent upon an FP.	2013-12-02 11:05:28 +00:00