Bruno Cardoso Lopes 97136c922e Based on the small opt Zvi's patch was trying to achieve, eliminate ... 128-bit undef subvector insertion into a 256-bit vector git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140097 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-19 23:36:50 +00:00
..
Alpha	Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective.	2011-09-14 00:29:50 +00:00
ARM	Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier).	2011-09-19 22:02:33 +00:00
Blackfin
CBackend	Revert r137134. It breaks some code as Eli pointed out.	2011-08-09 18:56:35 +00:00
CellSPU	Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.	2011-09-02 10:05:01 +00:00
CPP
Generic	This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll	2011-09-08 08:43:23 +00:00
MBlaze
Mips	Delete test cases that generate code for allegrex/psp and cannot be repurposed.	2011-09-13 22:29:13 +00:00
MSP430
PowerPC	Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective.	2011-09-14 00:29:50 +00:00
PTX	PTX: Add initial support for device function calls	2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb	Disable these tests harder. They're XFAIL'd, but that means they still run, and	2011-09-06 22:08:18 +00:00
Thumb2	Generalize this test's CHECK statements to handle different indvars modes.	2011-09-13 02:46:27 +00:00
X86	Based on the small opt Zvi's patch was trying to achieve, eliminate	2011-09-19 23:36:50 +00:00
XCore	Associate a MemOperand with LDWCP nodes introduced during ISel.	2011-09-12 14:43:23 +00:00