llvm-6502/test/CodeGen
Dan Gohman 279c22e6da Optimized FCMP_OEQ and FCMP_UNE for x86.
Where previously LLVM might emit code like this:

        ucomisd %xmm1, %xmm0
        setne   %al
        setp    %cl
        orb     %al, %cl
        jne     .LBB4_2

it now emits this:

        ucomisd %xmm1, %xmm0
        jne     .LBB4_2
        jp      .LBB4_2

It has fewer instructions and uses fewer registers, but it does
have more branches. And in the case that this code is followed by
a non-fallthrough edge, it may be followed by a jmp instruction,
resulting in three branch instructions in sequence. Some effort
is made to avoid this situation.

To achieve this, X86ISelLowering.cpp now recognizes FCMP_OEQ and
FCMP_UNE in lowered form, and replace them with code that emits
two branches, except in the case where it would require converting
a fall-through edge to an explicit branch.

Also, X86InstrInfo.cpp's branch analysis and transform code now
knows now to handle blocks with multiple conditional branches. It
uses loops instead of having fixed checks for up to two
instructions. It can now analyze and transform code generated
from FCMP_OEQ and FCMP_UNE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57873 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:29:32 +00:00
..
Alpha
ARM
CBackend
CellSPU remove an xfailed test. 2008-10-17 17:26:48 +00:00
CPP
Generic remove this test: it is xfailed anyway, and is failing for a reason 2008-10-17 17:26:19 +00:00
IA64 sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
Mips FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington. 2008-10-13 18:46:18 +00:00
PowerPC Reapply r57699 with a fix to not crash on asms with multiple results. Unlike 2008-10-18 18:49:30 +00:00
SPARC
X86 Optimized FCMP_OEQ and FCMP_UNE for x86. 2008-10-21 03:29:32 +00:00