Akira Hatanaka db8e0bbedb [mips] Increase the number of floating point control registers available to 32. ...

Create a dedicated register class for floating point condition code registers and
move FCC0 from register class CCR to the new register class.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185373 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-01 20:31:44 +00:00

..

lit.local.cfg

…

mips32_le.txt

[mips] Increase the number of floating point control registers available to 32.

2013-07-01 20:31:44 +00:00

mips32.txt

[mips] Increase the number of floating point control registers available to 32.

2013-07-01 20:31:44 +00:00

mips32r2_le.txt

[mips] Increase the number of floating point control registers available to 32.

2013-07-01 20:31:44 +00:00

mips32r2.txt

[mips] Increase the number of floating point control registers available to 32.

2013-07-01 20:31:44 +00:00

mips64_le.txt

Use object file specific section type for initial text section

2013-04-14 21:18:36 +00:00

mips64.txt

Use object file specific section type for initial text section

2013-04-14 21:18:36 +00:00

mips64r2_le.txt

Use object file specific section type for initial text section

2013-04-14 21:18:36 +00:00

mips64r2.txt

Use object file specific section type for initial text section

2013-04-14 21:18:36 +00:00

mips-dsp.txt

[mips] DSP-ASE move from HI/LO register instructions.

2013-04-18 00:52:44 +00:00