Bob Wilson 7dcd04abe0 Expand VMOVQQQQ pseudo instructions. ... Apparently we never added code to expand these pseudo instructions, and in over a year, no one has noticed. Our register allocator must be awesome! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137551 91177308-0d34-0410-b5e6-96231b3b80d8		2011-08-13 05:14:55 +00:00
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Alpha
ARM	Expand VMOVQQQQ pseudo instructions.	2011-08-13 05:14:55 +00:00
Blackfin
CBackend	Revert r137134. It breaks some code as Eli pointed out.	2011-08-09 18:56:35 +00:00
CellSPU
CPP
Generic
MBlaze
Mips	Define unaligned load and store.	2011-08-12 21:30:06 +00:00
MSP430
PowerPC	Add MCObjectFileInfo and sink the MCSections initialization code from	2011-07-20 05:58:47 +00:00
PTX	PTX: Add initial support for device function calls	2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb
Thumb2	Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611.	2011-08-08 19:49:37 +00:00
X86	The VPERM2F128 is a AVX instruction which permutes between two 256-bit	2011-08-12 21:48:26 +00:00
XCore	Fix crash with varargs function with no named parameters.	2011-08-01 16:45:59 +00:00