| .. |
|
128bit-kernel-args.ll
|
|
|
|
add.v4i32.ll
|
|
|
|
alu-split.ll
|
R600: Fix last ALU of a clause being emitted in a separate clause
|
2013-04-03 18:24:47 +00:00 |
|
and.v4i32.ll
|
|
|
|
dagcombiner-bug-illegal-vec4-int-to-fp.ll
|
|
|
|
disconnected-predset-break-bug.ll
|
R600: Add support for native control flow
|
2013-04-01 21:48:05 +00:00 |
|
fabs.ll
|
|
|
|
fadd.ll
|
|
|
|
fadd.v4f32.ll
|
|
|
|
fcmp-cnd.ll
|
|
|
|
fcmp-cnde-int-args.ll
|
|
|
|
fcmp.ll
|
|
|
|
fdiv.v4f32.ll
|
|
|
|
floor.ll
|
|
|
|
fmad.ll
|
|
|
|
fmax.ll
|
|
|
|
fmin.ll
|
|
|
|
fmul.ll
|
|
|
|
fmul.v4f32.ll
|
|
|
|
fsub.ll
|
|
|
|
fsub.v4f32.ll
|
|
|
|
i8_to_double_to_float.ll
|
|
|
|
icmp-select-sete-reverse-args.ll
|
|
|
|
kcache-fold.ll
|
R600: Emit CF_ALU and use true kcache register.
|
2013-04-01 21:47:42 +00:00 |
|
legalizedag-bug-expand-setcc.ll
|
|
|
|
lit.local.cfg
|
|
|
|
literals.ll
|
|
|
|
llvm.AMDGPU.mul.ll
|
|
|
|
llvm.AMDGPU.tex.ll
|
|
|
|
llvm.AMDGPU.trunc.ll
|
|
|
|
llvm.cos.ll
|
|
|
|
llvm.pow.ll
|
R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730
|
2013-03-22 15:24:16 +00:00 |
|
llvm.SI.fs.interp.constant.ll
|
R600/SI: mark most intrinsics as readnone v2
|
2013-03-26 14:03:57 +00:00 |
|
llvm.SI.sample.ll
|
R600/SI: mark most intrinsics as readnone v2
|
2013-03-26 14:03:57 +00:00 |
|
llvm.sin.ll
|
|
|
|
load.constant_addrspace.f32.ll
|
|
|
|
load.i8.ll
|
|
|
|
lshl.ll
|
R600/SI: add cummuting of rev instructions
|
2013-03-27 09:12:59 +00:00 |
|
lshr.ll
|
R600/SI: add cummuting of rev instructions
|
2013-03-27 09:12:59 +00:00 |
|
mulhu.ll
|
R600/SI: add cummuting of rev instructions
|
2013-03-27 09:12:59 +00:00 |
|
predicates.ll
|
R600: Add support for native control flow
|
2013-04-01 21:48:05 +00:00 |
|
reciprocal.ll
|
|
|
|
schedule-fs-loop-nested-if.ll
|
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
|
2013-03-11 23:16:30 +00:00 |
|
schedule-fs-loop-nested.ll
|
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
|
2013-03-11 23:16:30 +00:00 |
|
schedule-fs-loop.ll
|
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
|
2013-03-11 23:16:30 +00:00 |
|
schedule-if-2.ll
|
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
|
2013-03-11 23:16:30 +00:00 |
|
schedule-if.ll
|
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
|
2013-03-11 23:16:30 +00:00 |
|
schedule-vs-if-nested-loop.ll
|
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.
|
2013-03-11 23:16:30 +00:00 |
|
sdiv.ll
|
|
|
|
selectcc_cnde_int.ll
|
|
|
|
selectcc_cnde.ll
|
|
|
|
selectcc-icmp-select-float.ll
|
|
|
|
selectcc-opt.ll
|
|
|
|
set-dx10.ll
|
|
|
|
setcc.v4i32.ll
|
|
|
|
seto.ll
|
R600/SI: add SETO/SETUO patterns
|
2013-03-27 15:27:31 +00:00 |
|
setuo.ll
|
R600/SI: add SETO/SETUO patterns
|
2013-03-27 15:27:31 +00:00 |
|
short-args.ll
|
|
|
|
store.v4f32.ll
|
|
|
|
store.v4i32.ll
|
|
|
|
udiv.v4i32.ll
|
|
|
|
unsupported-cc.ll
|
|
|
|
urem.v4i32.ll
|
|
|
|
vec4-expand.ll
|
|
|
