Toma Tabacu 0e407e7bbf [TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions. ... Summary: The loop which emits AssemblerPredicate conditions also links them together by emitting a '&&'. If the 1st predicate is not an AssemblerPredicate, while the 2nd one is, nothing gets emitted for the 1st one, but we still emit the '&&' because of the 2nd predicate. This generated code looks like "( && Cond2)" and is invalid. Reviewers: dsanders Reviewed By: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D8294 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234312 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-07 12:10:11 +00:00
..
AsmMatcherEmitter.cpp	Revert "Use std::bitset for SubtargetFeatures"	2015-03-24 12:56:59 +00:00
AsmWriterEmitter.cpp	[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the	2015-03-27 20:36:02 +00:00
AsmWriterInst.cpp	[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the	2015-03-27 20:36:02 +00:00
AsmWriterInst.h	[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the	2015-03-27 20:36:02 +00:00
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp	[Tablegen] Attempt to add support for patterns containing nodes with multiple results.	2015-03-20 05:09:06 +00:00
CodeGenDAGPatterns.h
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp	Fix AllocationPriority not getting set for derived register classes.	2015-03-31 20:52:25 +00:00
CodeGenRegisters.h	RegAllocGreedy: Allow target to specify register class ordering.	2015-03-31 19:57:53 +00:00
CodeGenSchedule.cpp
CodeGenSchedule.h
CodeGenTarget.cpp
CodeGenTarget.h
CTagsEmitter.cpp
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp	Teach raw_ostream to accept SmallString.	2015-03-10 07:33:23 +00:00
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp	[TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions.	2015-04-07 12:10:11 +00:00
InstrInfoEmitter.cpp	Revert "Use std::bitset for SubtargetFeatures"	2015-03-24 12:56:59 +00:00
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
module.modulemap
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp	TableGen: Generate more const goodness	2015-04-01 22:09:55 +00:00
SequenceToOffsetTable.h
SubtargetEmitter.cpp	Revert "Use std::bitset for SubtargetFeatures"	2015-03-24 12:56:59 +00:00
TableGen.cpp
TableGenBackends.h
tdtags
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp
X86RecognizableInstr.h