llvm-6502/test/CodeGen
2014-05-13 11:41:49 +00:00
..
AArch64 TableGen: use PrintMethods to print more aliases 2014-05-12 18:04:06 +00:00
ARM ARMEB: Fix byte order of EH frame unwinding instructions 2014-05-13 11:41:49 +00:00
ARM64 Folding into CSEL when there is ZEXT between SETCC and ADD 2014-05-13 00:40:58 +00:00
CPP
Generic MC: move test from Generic to COFF 2014-04-23 21:41:07 +00:00
Hexagon Fix broken CHECK lines 2014-02-16 07:31:05 +00:00
Inputs
Mips Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX Fix the test: DCE optimized away everything. 2014-04-21 17:23:12 +00:00
PowerPC [PowerPC] Add global named register support 2014-05-11 19:29:11 +00:00
R600 R600: Add mul24 intrinsics 2014-05-12 17:49:57 +00:00
SPARC Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
SystemZ Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
Thumb Make this test not match its own filename, when being run from a path that includes the string 'add'. 2014-04-15 22:29:32 +00:00
Thumb2 Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
X86 Try to fix an SDAG dependence issue with sret 2014-05-12 22:01:27 +00:00
XCore Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl" 2014-04-21 17:57:07 +00:00