llvm-6502/lib/Target/R600
Matt Arsenault 0ed20177c2 Remove unused include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212898 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-13 03:08:59 +00:00
..
InstPrinter Fix missing words in sentence 2014-06-23 18:00:26 +00:00
MCTargetDesc Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert. 2014-06-19 06:10:58 +00:00
TargetInfo
AMDGPU.h R600/SI: Adjsut SGPR live ranges before register allocation 2014-07-02 20:53:48 +00:00
AMDGPU.td R600: Add option to disable promote alloca 2014-07-13 02:08:26 +00:00
AMDGPUAsmPrinter.cpp R600: Use range for and fix missing consts. 2014-07-13 03:06:43 +00:00
AMDGPUAsmPrinter.h Remove unused include 2014-07-13 03:08:59 +00:00
AMDGPUCallingConv.td R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
AMDGPUFrameLowering.cpp Fix typo 2014-06-14 04:26:07 +00:00
AMDGPUFrameLowering.h De-virtualize or remove some methods that have no overrides nor override anything. In some cases remove all together if there are no callers either. 2014-04-30 05:53:27 +00:00
AMDGPUInstrInfo.cpp R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
AMDGPUInstrInfo.h R600: Remove unused declarations leftover from AMDIL 2014-06-30 17:37:17 +00:00
AMDGPUInstrInfo.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUInstructions.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUIntrinsicInfo.cpp R600: Rename AMDIL file 2014-06-23 18:00:31 +00:00
AMDGPUIntrinsicInfo.h R600: Rename AMDIL file 2014-06-23 18:00:31 +00:00
AMDGPUIntrinsics.td R600: Fix inconsistency in rsq instructions. 2014-06-24 22:13:39 +00:00
AMDGPUISelDAGToDAG.cpp R600/SI: Use a ComplexPattern for MUBUF stores 2014-06-24 23:33:07 +00:00
AMDGPUISelLowering.cpp R600: Implement float to long/ulong 2014-07-10 22:40:21 +00:00
AMDGPUISelLowering.h R600: Move mul combine to separate function 2014-06-30 17:55:48 +00:00
AMDGPUMachineFunction.cpp R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
AMDGPUMachineFunction.h R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
AMDGPUMCInstLower.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
AMDGPUMCInstLower.h Alphabetize forward declarations 2014-06-23 18:00:20 +00:00
AMDGPUPromoteAlloca.cpp R600: Don't crash on unhandled instruction in promote alloca 2014-06-27 16:52:49 +00:00
AMDGPURegisterInfo.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
AMDGPURegisterInfo.h R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600: Add option to disable promote alloca 2014-07-13 02:08:26 +00:00
AMDGPUSubtarget.h R600: Add option to disable promote alloca 2014-07-13 02:08:26 +00:00
AMDGPUTargetMachine.cpp R600: Add option to disable promote alloca 2014-07-13 02:08:26 +00:00
AMDGPUTargetMachine.h R600: Rename AMDIL file 2014-06-23 18:00:31 +00:00
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
CaymanInstructions.td R600: Expand mul24 for GPUs without it 2014-05-22 18:00:24 +00:00
CMakeLists.txt R600/SI: Adjsut SGPR live ranges before register allocation 2014-07-02 20:53:48 +00:00
EvergreenInstructions.td R600/SI: Add a pattern for llvm.AMDGPU.barrier.global 2014-06-17 16:53:09 +00:00
LLVMBuild.txt
Makefile
Processors.td R600/SI: Add processor type for Mullins. 2014-05-02 15:41:49 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
R600InstrInfo.h R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
R600Instructions.td R600/SI: fix shadow mapping for 1D and 2D array textures 2014-07-11 17:11:39 +00:00
R600Intrinsics.td
R600ISelLowering.cpp R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
R600ISelLowering.h R600: Remove AMDILISelLowering 2014-06-23 18:00:55 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
R600RegisterInfo.cpp R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
R600RegisterInfo.h R600: Remove AMDIL instruction and register definitions 2014-06-13 16:38:59 +00:00
R600RegisterInfo.td R600: Use LDS and vectors for private memory 2014-06-17 16:53:14 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp R600/SI: SI Control Flow Annotation bug fixed 2014-06-20 17:06:02 +00:00
SIDefines.h R600/SI: Add FP mode bits to binary. 2014-06-26 17:22:30 +00:00
SIFixSGPRCopies.cpp R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies 2014-05-15 14:41:55 +00:00
SIFixSGPRLiveRanges.cpp R600/SI: Adjsut SGPR live ranges before register allocation 2014-07-02 20:53:48 +00:00
SIInsertWaits.cpp R600/SI: Add intrinsics for various math instructions. 2014-06-19 01:19:19 +00:00
SIInstrFormats.td R600/SI: Make sure target flags are set on pseudo VOP3 instructions 2014-06-17 19:34:46 +00:00
SIInstrInfo.cpp R600/SI: Add verifier check for immediates in register operands. 2014-07-02 20:53:44 +00:00
SIInstrInfo.h R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget 2014-06-13 01:32:00 +00:00
SIInstrInfo.td R600/SI: Use a ComplexPattern for ADDR64 addressing of MUBUF loads 2014-07-02 20:53:56 +00:00
SIInstructions.td R600/SI: Use i32 vectors for resources and samplers 2014-07-11 17:11:52 +00:00
SIIntrinsics.td R600/SI: Use i32 vectors for resources and samplers 2014-07-11 17:11:52 +00:00
SIISelLowering.cpp R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
SIISelLowering.h [codegen,aarch64] Add a target hook to the code generator to control 2014-07-03 00:23:43 +00:00
SILowerControlFlow.cpp R600: Make ShaderType private 2014-07-13 03:06:39 +00:00
SILowerI1Copies.cpp R600/SI: Use VALU instructions for i1 ops 2014-05-15 14:41:50 +00:00
SIMachineFunctionInfo.cpp Fix typo, weird indentation 2014-07-07 18:34:42 +00:00
SIMachineFunctionInfo.h R600/SI: Only create one instruction when spilling/restoring register v3 2014-05-02 15:41:42 +00:00
SIRegisterInfo.cpp R600/SI: Add verifier check for immediates in register operands. 2014-07-02 20:53:44 +00:00
SIRegisterInfo.h R600/SI: Add verifier check for immediates in register operands. 2014-07-02 20:53:44 +00:00
SIRegisterInfo.td R600/SI: add gather4 and getlod intrinsics (v3) 2014-06-18 22:00:29 +00:00
SISchedule.td
SITypeRewriter.cpp Use cast<> instead of dyn_cast + assert 2014-07-05 21:16:43 +00:00