..
AsmParser
R600/SI: Add a stub GCNTargetMachine
2015-01-06 18:00:21 +00:00
InstPrinter
[cleanup] Re-sort all the #include lines in LLVM using
2015-01-14 11:23:27 +00:00
MCTargetDesc
Revert "Add r224985 back with two fixes."
2015-01-14 19:07:23 +00:00
TargetInfo
R600/SI: Add a stub GCNTargetMachine
2015-01-06 18:00:21 +00:00
AMDGPU.h
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
AMDGPU.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUAlwaysInlinePass.cpp
Reapply: R600: Make sure to inline all internal functions
2014-11-03 19:49:05 +00:00
AMDGPUAsmPrinter.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
AMDGPUAsmPrinter.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
AMDGPUCallingConv.td
Remove the target machine from CCState. Previously it was only used
2014-08-06 18:45:26 +00:00
AMDGPUFrameLowering.cpp
Fix typo
2014-06-14 04:26:07 +00:00
AMDGPUFrameLowering.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
AMDGPUInstrInfo.cpp
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
AMDGPUInstrInfo.h
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
AMDGPUInstrInfo.td
R600/SI: Add class intrinsic
2015-01-06 23:00:37 +00:00
AMDGPUInstructions.td
R600/SI: Make more unordered comparisons legal
2014-12-11 22:15:39 +00:00
AMDGPUIntrinsicInfo.cpp
Move R600 subtarget dependent variables onto the subtarget.
2014-07-25 22:22:39 +00:00
AMDGPUIntrinsicInfo.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
AMDGPUIntrinsics.td
R600: Remove intrinsics that appear to be unused
2014-07-15 20:10:27 +00:00
AMDGPUISelDAGToDAG.cpp
R600/SI: Use RegisterOperands to specify which operands can accept immediates
2015-01-12 19:33:18 +00:00
AMDGPUISelLowering.cpp
Implement new way of expanding extloads.
2015-01-14 01:35:17 +00:00
AMDGPUISelLowering.h
R600: Implement getRecipEstimate
2015-01-13 20:53:23 +00:00
AMDGPUMachineFunction.cpp
R600/SI: Add preliminary support for flat address space
2014-09-15 15:41:53 +00:00
AMDGPUMachineFunction.h
Reapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 20:05:26 +00:00
AMDGPUMCInstLower.cpp
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
AMDGPUMCInstLower.h
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
AMDGPUPromoteAlloca.cpp
R600: Don't promote allocas when one of the users is a ptrtoint instruction
2014-10-31 20:52:04 +00:00
AMDGPURegisterInfo.cpp
R600/SI: Enable inline assembly
2014-12-03 04:08:00 +00:00
AMDGPURegisterInfo.h
Add override to overriden virtual methods, remove virtual keywords.
2014-09-03 11:41:21 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
[cleanup] Re-sort all the #include lines in LLVM using
2015-01-14 11:23:27 +00:00
AMDGPUSubtarget.h
[cleanup] Re-sort all the #include lines in LLVM using
2015-01-14 11:23:27 +00:00
AMDGPUTargetMachine.cpp
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
AMDGPUTargetMachine.h
R600/SI: Add a stub GCNTargetMachine
2015-01-06 18:00:21 +00:00
AMDGPUTargetTransformInfo.cpp
Fix broken doxygen annotations, NFC
2014-11-12 18:25:06 +00:00
AMDILCFGStructurizer.cpp
Fix typos:
2014-08-11 18:04:46 +00:00
AMDKernelCodeT.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
CaymanInstructions.td
R600: Match rcp node on pre-SI
2014-07-24 06:59:24 +00:00
CIInstructions.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
CMakeLists.txt
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
EvergreenInstructions.td
R600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs
2014-11-02 23:46:54 +00:00
LLVMBuild.txt
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Makefile
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Processors.td
R600/SI: Define a schedule model
2015-01-14 01:13:19 +00:00
R600ClauseMergePass.cpp
Have MachineFunction cache a pointer to the subtarget to make lookups
2014-08-05 02:39:49 +00:00
R600ControlFlowFinalizer.cpp
Remove unnecessary copying or replace it with moves in a bunch of places.
2014-10-04 16:55:56 +00:00
R600Defines.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600EmitClauseMarkers.cpp
Have MachineFunction cache a pointer to the subtarget to make lookups
2014-08-05 02:39:49 +00:00
R600ExpandSpecialInstrs.cpp
Have MachineFunction cache a pointer to the subtarget to make lookups
2014-08-05 02:39:49 +00:00
R600InstrFormats.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
R600InstrInfo.h
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
R600Instructions.td
R600/SI: Use unordered not equal instructions
2014-12-11 22:15:35 +00:00
R600Intrinsics.td
R600ISelLowering.cpp
[SelectionDAG] Allow targets to specify legality of extloads' result
2015-01-08 00:51:32 +00:00
R600ISelLowering.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600MachineScheduler.cpp
Fix float division-by-zero in R600 scheduler.
2014-09-17 17:47:21 +00:00
R600MachineScheduler.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600OptimizeVectorRegisters.cpp
Eliminate some deep std::vector copies. NFC.
2014-10-03 18:33:16 +00:00
R600Packetizer.cpp
Cleanup: Delete seemingly unused reference to MachineDominatorTree from ScheduleDAGInstrs.
2014-08-20 20:57:26 +00:00
R600RegisterInfo.cpp
R600: Remove AMDIL instruction and register definitions
2014-06-13 16:38:59 +00:00
R600RegisterInfo.h
Canonicalize header guards into a common format.
2014-08-13 16:26:38 +00:00
R600RegisterInfo.td
R600: Use LDS and vectors for private memory
2014-06-17 16:53:14 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition
2014-04-29 07:57:24 +00:00
R700Instructions.td
R600: Reorganize tablegen instruction definitions
2014-03-24 16:07:25 +00:00
SIAnnotateControlFlow.cpp
R600/SI: SI Control Flow Annotation bug fixed
2014-06-20 17:06:02 +00:00
SIDefines.h
R600/SI: Use RegisterOperands to specify which operands can accept immediates
2015-01-12 19:33:18 +00:00
SIFixSGPRCopies.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
SIFixSGPRLiveRanges.cpp
R600/SI: Fix the FixSGPRLiveRanges pass
2014-09-24 01:33:24 +00:00
SIFoldOperands.cpp
R600/SI: Add pattern for bitcasting fp immediates to integers
2015-01-13 22:59:41 +00:00
SIInsertWaits.cpp
R600/SI: Insert s_waitcnt before s_barrier instructions.
2015-01-06 19:52:07 +00:00
SIInstrFormats.td
R600/SI: Add common class VOPAnyCommon
2015-01-15 18:42:44 +00:00
SIInstrInfo.cpp
R600/SI: Use 64-bit encoding by default for opcodes that are VOP3-only on VI
2015-01-15 18:43:01 +00:00
SIInstrInfo.h
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
SIInstrInfo.td
R600/SI: Unify VOP2 instructions which are VOP3-only on VI
2015-01-15 18:43:06 +00:00
SIInstructions.td
R600/SI: Unify VOP2 instructions which are VOP3-only on VI
2015-01-15 18:43:06 +00:00
SIIntrinsics.td
R600/SI: Use i32 vectors for resources and samplers
2014-07-11 17:11:52 +00:00
SIISelLowering.cpp
R600/SI: Fix bad code with unaligned byte vector loads
2015-01-14 01:35:22 +00:00
SIISelLowering.h
R600/SI: Fix bad code with unaligned byte vector loads
2015-01-14 01:35:22 +00:00
SILoadStoreOptimizer.cpp
R600/SI: Fix live range error hidden by SIFoldOperands
2014-12-03 05:22:29 +00:00
SILowerControlFlow.cpp
R600/SI: Add pattern for bitcasting fp immediates to integers
2015-01-13 22:59:41 +00:00
SILowerI1Copies.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
SIMachineFunctionInfo.cpp
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
SIMachineFunctionInfo.h
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
SIPrepareScratchRegs.cpp
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
SIRegisterInfo.cpp
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
SIRegisterInfo.h
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
SIRegisterInfo.td
R600/SI: Use RegisterOperands to specify which operands can accept immediates
2015-01-12 19:33:18 +00:00
SISchedule.td
R600/SI: Define a schedule model
2015-01-14 01:13:19 +00:00
SIShrinkInstructions.cpp
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
SITypeRewriter.cpp
Revert "IR: MDNode => Value"
2014-11-11 21:30:22 +00:00
VIInstrFormats.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
VIInstructions.td
R600/SI: Unify VOP2 instructions which are VOP3-only on VI
2015-01-15 18:43:06 +00:00