mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-17 03:30:28 +00:00
3df4d525c5
like turning: _foo: fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) rlwinm r3, r2, 0, 16, 31 blr into _foo: fctiwz f0,f1 stfd f0,-8(r1) lhz r3,-2(r1) blr Also removed an unncessary constraint from sra -> srl conversion, which should take care of hte only reason we would ever need to handle sra in MaskedValueIsZero, AFAIK. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23703 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
SelectionDAG | ||
AsmPrinter.cpp | ||
BranchFolding.cpp | ||
ELFWriter.cpp | ||
IntrinsicLowering.cpp | ||
LiveInterval.cpp | ||
LiveIntervalAnalysis.cpp | ||
LiveVariables.cpp | ||
MachineBasicBlock.cpp | ||
MachineCodeEmitter.cpp | ||
MachineFunction.cpp | ||
MachineInstr.cpp | ||
Makefile | ||
Passes.cpp | ||
PHIElimination.cpp | ||
PhysRegTracker.h | ||
PrologEpilogInserter.cpp | ||
RegAllocIterativeScan.cpp | ||
RegAllocLinearScan.cpp | ||
RegAllocLocal.cpp | ||
RegAllocSimple.cpp | ||
TwoAddressInstructionPass.cpp | ||
UnreachableBlockElim.cpp | ||
VirtRegMap.cpp | ||
VirtRegMap.h |