llvm-6502/test/CodeGen
Rafael Espindola 17ab16a248 Correctly handle the degenerated triple "thumb".
Fixes a crash in llc where some parts think the target is thumb and others think
it is ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-18 21:29:44 +00:00
..
AArch64 [AArch64 NEON]Implment loading vector constant form constant pool. 2013-12-18 06:26:04 +00:00
ARM ARM: force soft-float ABI for tests depending on it. 2013-12-18 09:58:06 +00:00
CPP
Generic Fix pr18235. 2013-12-13 16:05:32 +00:00
Hexagon
Inputs
Mips Last change for mips16 prolog/epilog cleanup and optimization. 2013-12-15 20:49:30 +00:00
MSP430
NVPTX
PowerPC One ppc32-darwin, a i64 inside a structure can have 32 bit alignment. 2013-12-18 14:35:37 +00:00
R600 R600/SI: Minor improvements to test. 2013-12-14 00:38:04 +00:00
SPARC
SystemZ Add -mcpu=z10 to SystemZ tests. 2013-12-17 05:27:16 +00:00
Thumb Correctly handle the degenerated triple "thumb". 2013-12-18 21:29:44 +00:00
Thumb2 Enabling thumb2 mode used to force support for armv6t2. Replace this 2013-12-13 11:16:00 +00:00
X86 Disabled subregister copy coalescing during MachineCSE. 2013-12-17 19:29:36 +00:00
XCore