Chris Lattner 43f44aa160 improve x86 codegen support for blockaddress. We now compile ... the testcase into: _test1: ## @test1 ## BB#0: ## %entry leaq L_test1_bb6(%rip), %rax jmpq *%rax L_test1_bb: ## Address Taken LBB1_1: ## %bb movb $1, %al ret L_test1_bb6: ## Address Taken LBB1_2: ## %bb6 movb $2, %al ret Note, it is very very strange that BlockAddressSDNode doesn't carry around TargetFlags. Dan, please fix this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85703 91177308-0d34-0410-b5e6-96231b3b80d8		2009-11-01 03:25:03 +00:00
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Alpha	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
ARM	vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using	2009-10-31 22:57:36 +00:00
Blackfin	Move Blackfin intrinsics into the Target/Blackfin directory.	2009-10-15 18:50:52 +00:00
CBackend	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
CellSPU	Revert the main portion of r31856. It was causing BranchFolding	2009-10-22 00:03:58 +00:00
CPP	fix PR5295 where the .ll parser didn't reject a function after a global	2009-10-25 23:22:50 +00:00
Generic	Revert the main portion of r31856. It was causing BranchFolding	2009-10-22 00:03:58 +00:00
Mips	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
MSP430	Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected.	2009-10-22 00:16:00 +00:00
PIC16	Re-apply 84180 with the fixed test case.	2009-10-15 19:26:25 +00:00
PowerPC	Add nounwind to this test.	2009-09-24 20:20:08 +00:00
SPARC	Eliminate some redundant llvm-as calls.	2009-10-12 09:31:55 +00:00
SystemZ	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
Thumb	Enable allocation of R3 in Thumb1	2009-10-19 22:57:03 +00:00
Thumb2	Use cbz and cbnz instructions.	2009-10-31 23:46:45 +00:00
X86	improve x86 codegen support for blockaddress. We now compile	2009-11-01 03:25:03 +00:00
XCore	Add some peepholes for signed comparisons using ashr X, X, 32.	2009-10-08 15:38:17 +00:00