Josh Magee 4598b40ce6 [stackprotector] Update the StackProtector pass to perform datalayout analysis. ... This modifies the pass to classify every SSP-triggering AllocaInst according to an SSPLayoutKind (LargeArray, SmallArray, AddrOf). This analysis is collected by the pass and made available for use, but no other pass uses it yet. The next patch will make use of this analysis in PEI and StackSlot passes. The end goal is to support ssp-strong stack layout rules. WIP. Differential Revision: http://llvm-reviews.chandlerc.com/D1789 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193653 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-29 21:16:16 +00:00
..
PBQP
Analysis.h
AsmPrinter.h	Add a helper getSymbol to AsmPrinter.	2013-10-29 17:07:16 +00:00
CalcSpillWeights.h
CallingConvLower.h
CommandFlags.h	Speling fixes.	2013-10-22 15:18:03 +00:00
DAGCombine.h
DFAPacketizer.h
EdgeBundles.h
FastISel.h
FunctionLoweringInfo.h
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h	[ARM] Use the load-acquire/store-release instructions optimally in AArch32.	2013-09-26 12:22:36 +00:00
JITCodeEmitter.h
LatencyPriorityQueue.h
LexicalScopes.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h	Print register in LiveInterval::print()	2013-10-10 21:29:05 +00:00
LiveIntervalAnalysis.h	Represent RegUnit liveness with LiveRange instance	2013-10-10 21:29:02 +00:00
LiveIntervalUnion.h	Rename LiveRange to LiveInterval::Segment	2013-10-10 21:28:43 +00:00
LiveRangeEdit.h
LiveRegMatrix.h
LiveRegUnits.h	LiveRegUnits: Use *MBB for consistency and convenience.	2013-10-14 22:18:59 +00:00
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h	Even more spelling fixes for "instruction".	2013-09-28 13:42:22 +00:00
MachineBlockFrequencyInfo.h
MachineBranchProbabilityInfo.h
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h	Rename parameter: defined regs are not incoming.	2013-10-10 21:28:38 +00:00
MachineInstrBuilder.h
MachineInstrBundle.h
MachineJumpTableInfo.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachinePostDominators.h
MachineRegisterInfo.h	Add a convenient PSetIterator for visiting pressure sets affected by a register.	2013-08-23 17:48:46 +00:00
MachineRelocation.h
MachineScheduler.h	Allow subtarget selection of the default MachineScheduler and document the interface.	2013-09-20 05:14:41 +00:00
MachineSSAUpdater.h
MachineTraceMetrics.h
MachORelocation.h
Passes.h	Simplify formatting and sort these. No functionality changed.	2013-10-15 02:03:44 +00:00
PseudoSourceValue.h
RegAllocPBQP.h
RegAllocRegistry.h
RegisterClassInfo.h
RegisterPressure.h	Represent RegUnit liveness with LiveRange instance	2013-10-10 21:29:02 +00:00
RegisterScavenging.h
ResourcePriorityQueue.h
RuntimeLibcalls.h	LegalizeDAG: allow libcalls for max/min atomic operations	2013-10-25 09:30:20 +00:00
ScheduleDAG.h	Explicitly request unsigned enum types when desired	2013-10-08 20:15:11 +00:00
ScheduleDAGInstrs.h	Even more spelling fixes for "instruction".	2013-09-28 13:42:22 +00:00
ScheduleDFS.h
ScheduleHazardRecognizer.h
SchedulerRegistry.h
ScoreboardHazardRecognizer.h
SelectionDAG.h	Keep TBAA info when rewriting SelectionDAG loads and stores	2013-10-28 11:17:59 +00:00
SelectionDAGISel.h	Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.	2013-10-05 05:38:16 +00:00
SelectionDAGNodes.h	Remove an old workaround for a compiler that EOL'd years ago.	2013-09-29 19:39:02 +00:00
SlotIndexes.h
StackProtector.h	[stackprotector] Update the StackProtector pass to perform datalayout analysis.	2013-10-29 21:16:16 +00:00
TargetLoweringObjectFileImpl.h
TargetSchedule.h	IfConverter: Use TargetSchedule for instruction latencies	2013-09-30 15:28:56 +00:00
ValueTypes.h	Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).	2013-10-10 17:00:52 +00:00
ValueTypes.td	Implement aarch64 neon instruction set AdvSIMD (Across).	2013-10-05 08:22:10 +00:00
VirtRegMap.h