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https://github.com/c64scene-ar/llvm-6502.git
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707e018423
on any current target and aren't optimized in DAGCombiner. Instead of using intermediate nodes, expand the operations, choosing between simple loads/stores, target-specific code, and library calls, immediately. Previously, the code to emit optimized code for these operations was only used at initial SelectionDAG construction time; now it is used at all times. This fixes some cases where rep;movs was being used for small copies where simple loads/stores would be better. This also cleans up code that checks for alignments less than 4; let the targets make that decision instead of doing it in target-independent code. This allows x86 to use rep;movs in low-alignment cases. Also, this fixes a bug that resulted in the use of rep;stos for memsets of 0 with non-constant memory size when the alignment was at least 4. It's better to use the library in this case, which can be significantly faster when the size is large. This also preserves more SourceValue information when memory intrinsics are lowered into simple loads/stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| Alpha.h | ||
| Alpha.td | ||
| AlphaAsmPrinter.cpp | ||
| AlphaBranchSelector.cpp | ||
| AlphaCodeEmitter.cpp | ||
| AlphaInstrFormats.td | ||
| AlphaInstrInfo.cpp | ||
| AlphaInstrInfo.h | ||
| AlphaInstrInfo.td | ||
| AlphaISelDAGToDAG.cpp | ||
| AlphaISelLowering.cpp | ||
| AlphaISelLowering.h | ||
| AlphaJITInfo.cpp | ||
| AlphaJITInfo.h | ||
| AlphaLLRP.cpp | ||
| AlphaRegisterInfo.cpp | ||
| AlphaRegisterInfo.h | ||
| AlphaRegisterInfo.td | ||
| AlphaRelocations.h | ||
| AlphaSchedule.td | ||
| AlphaSubtarget.cpp | ||
| AlphaSubtarget.h | ||
| AlphaTargetAsmInfo.cpp | ||
| AlphaTargetAsmInfo.h | ||
| AlphaTargetMachine.cpp | ||
| AlphaTargetMachine.h | ||
| Makefile | ||
| README.txt | ||
*** add gcc builtins for alpha instructions *** custom expand byteswap into nifty extract/insert/mask byte/word/longword/quadword low/high sequences *** see if any of the extract/insert/mask operations can be added *** match more interesting things for cmovlbc cmovlbs (move if low bit clear/set) *** lower srem and urem remq(i,j): i - (j * divq(i,j)) if j != 0 remqu(i,j): i - (j * divqu(i,j)) if j != 0 reml(i,j): i - (j * divl(i,j)) if j != 0 remlu(i,j): i - (j * divlu(i,j)) if j != 0 *** add crazy vector instructions (MVI): (MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word PKWB, UNPKBW pack/unpack word to byte PKLB UNPKBL pack/unpack long to byte PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b)) cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions) this has some good examples for other operations that can be synthesised well from these rather meager vector ops (such as saturating add). http://www.alphalinux.org/docs/MVI-full.html