llvm-6502/test/CodeGen
Joey Gouly 4897151df6 [ARMv8] Implement the new DMB/DSB operands.
This removes the custom ISD Node: MEMBARRIER and replaces it
with an intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 15:35:24 +00:00
..
AArch64 Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions: 2013-09-04 09:28:24 +00:00
ARM [ARMv8] Implement the new DMB/DSB operands. 2013-09-05 15:35:24 +00:00
CPP
Generic
Hexagon
Inputs
Mips Make sure we don't generate stubs for any of these functions because they 2013-09-01 04:12:59 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Call support for fast-isel. 2013-08-30 22:18:55 +00:00
R600 R600: Use shared op optimization when checking cycle compatibility 2013-09-04 19:53:54 +00:00
SPARC [Sparc] Correctly handle call to functions with ReturnsTwice attribute. 2013-09-05 05:32:16 +00:00
SystemZ [SystemZ] Add NC, OC and XC 2013-09-05 10:36:45 +00:00
Thumb
Thumb2
X86 mi-sched: Force bottom up scheduling for generic targets. 2013-09-04 23:54:00 +00:00
XCore