llvm-6502/test/MC
Joey Gouly 4897151df6 [ARMv8] Implement the new DMB/DSB operands.
This removes the custom ISD Node: MEMBARRIER and replaces it
with an intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 15:35:24 +00:00
..
AArch64 Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions: 2013-09-04 09:28:24 +00:00
ARM [ARMv8] Implement the new DMB/DSB operands. 2013-09-05 15:35:24 +00:00
AsmParser [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
COFF Fix wrong code offset for unwind code SET_FPREG. 2013-08-27 04:16:16 +00:00
Disassembler Add AArch32 DCPS{1,2,3} and HLT instructions. 2013-09-05 14:14:19 +00:00
ELF [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
MachO The darwin integrated assembler for X86 in 64-bit mode is not rejecting 2013-08-29 00:19:03 +00:00
Markup
Mips [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. 2013-08-28 00:55:15 +00:00
PowerPC Given target assembler parsers a chance to handle variant expressions 2013-08-27 20:23:19 +00:00
SystemZ [SystemZ] Add NC, OC and XC 2013-09-05 10:36:45 +00:00
X86 [ms-inline asm] Support offsets after segment registers 2013-08-27 21:56:17 +00:00