Sanjay Patel 3cd5b83bb8 Match new shuffle codegen for MOVHPD patterns ... Add patterns to match SSE (shufpd) and AVX (vpermilpd) shuffle codegen when storing the high element of a v2f64. The existing patterns were only checking for an unpckh type of shuffle. http://llvm.org/bugs/show_bug.cgi?id=21791 Differential Revision: http://reviews.llvm.org/D6586 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223929 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-10 16:58:54 +00:00
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AArch64	[FastISel][AArch64] Fix a missing nullptr check in 'computeAddress'.	2014-12-09 19:44:38 +00:00
ARM	[ARM] Combine base-updating/post-incrementing vector load/stores.	2014-12-10 00:07:37 +00:00
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PowerPC	[PowerPC 4/4] Enable little-endian support for VSX.	2014-12-09 16:59:57 +00:00
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X86	Match new shuffle codegen for MOVHPD patterns	2014-12-10 16:58:54 +00:00
XCore