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LLVM backend for 6502
492d76b02e
When there are multiple tied use-def pairs on an inline asm instruction, the tied uses must appear in the same order as the defs. It is possible to write an LLVM IR inline asm instruction that breaks this constraint, but there is no reason for a front end to emit the operands out of order. The gnu inline asm syntax specifies tied operands as a single read/write constraint "+r", so ouf of order operands are not possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162878 91177308-0d34-0410-b5e6-96231b3b80d8 |
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docs | ||
examples | ||
include | ||
lib | ||
projects | ||
runtime | ||
test | ||
tools | ||
unittests | ||
utils | ||
.gitignore | ||
CMakeLists.txt | ||
CODE_OWNERS.TXT | ||
configure | ||
CREDITS.TXT | ||
LICENSE.TXT | ||
llvm.spec.in | ||
LLVMBuild.txt | ||
Makefile | ||
Makefile.common | ||
Makefile.config.in | ||
Makefile.rules | ||
README.txt |
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