Devang Patel afeaae7a94 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8

2010-12-06 22:39:26 +00:00

..

useful-harnesses

…

2009-01-01-BrCond.ll

…

2010-04-07-DbgValueOtherTargets.ll

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

and_ops.ll

…

arg_ret.ll

Fix memory access lowering on SPU, adding

2010-11-12 10:14:03 +00:00

bigstack.ll

Have SPU handle halfvec stores aligned by 8 bytes.

2010-08-09 16:33:00 +00:00

bss.ll

Make sure this test tests something.

2010-04-09 19:03:31 +00:00

call_indirect.ll

Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.

2010-07-16 04:45:42 +00:00

call.ll

Fix SPU BE to use all the available return registers.

2010-08-24 11:50:48 +00:00

crash.ll

teach cellspu how to return i8 and i16 from calls,

2010-04-20 05:36:09 +00:00

ctpop.ll

…

dg.exp

…

div_ops.ll

Division by pow-of-2 is not cheap on SPU, do it with

2010-11-23 13:27:59 +00:00

dp_farith.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

eqv.ll

…

extract_elt.ll

…

fcmp32.ll

Allow for 'fcmp ogt' in SPU.

2010-11-24 11:42:17 +00:00

fcmp64.ll

…

fdiv.ll

…

fneg-fabs.ll

…

i8ops.ll

…

i64ops.ll

…

icmp8.ll

…

icmp16.ll

…

icmp32.ll

…

icmp64.ll

…

immed16.ll

…

immed32.ll

…

immed64.ll

…

int2fp.ll

…

intrinsics_branch.ll

…

intrinsics_float.ll

…

intrinsics_logical.ll

…

jumptable.ll

Mark the SPU 'lr' instruction to never have side effects.

2010-06-21 15:08:16 +00:00

loads.ll

Fix memory access lowering on SPU, adding

2010-11-12 10:14:03 +00:00

mul_ops.ll

Teach dag combine to fold the following transformation more aggressively:

2010-01-06 19:38:29 +00:00

mul-with-overflow.ll

…

nand.ll

…

or_ops.ll

…

private.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

rotate_ops.ll

Fix a bug with extractelement on SPU.

2010-11-22 16:28:26 +00:00

select_bits.ll

…

sext128.ll

Enable PostRA scheduling for SPU.

2010-11-29 10:30:25 +00:00

shift_ops.ll

Handle lshr for i128 correctly on SPU also when

2010-11-29 14:44:28 +00:00

shuffles.ll

Enable PostRA scheduling for SPU.

2010-11-29 10:30:25 +00:00

sp_farith.ll

…

stores.ll

Fix memory access lowering on SPU, adding

2010-11-12 10:14:03 +00:00

storestruct.ll

"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."

2010-05-04 17:58:46 +00:00

struct_1.ll

…

sub_ops.ll

Fix encoding of 'sf' and 'sfh' instructions.

2010-05-10 08:13:49 +00:00

trunc.ll

…

v2f32.ll

Change v64 datalayout in SPU.

2010-10-26 10:45:47 +00:00

v2i32.ll

Change v64 datalayout in SPU.

2010-10-26 10:45:47 +00:00

vec_const.ll

…

vecinsert.ll

Fix SPU to cope with vector insertelement to an undef position.

2010-06-09 09:58:17 +00:00