Rafael Espindola 28b186f3cc Improve the --expand-relocs handling of MachO. ... In a relocation target can take 3 basic forms * A r_value in scattered relocations. * A symbol in external relocations. * A section is non-external relocations. Have the dump reflect that. With this change we go from CHECK-NEXT: Extern: 0 CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) CHECK-NEXT: Symbol: 0x2 CHECK-NEXT: Scattered: 0 To just // CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) // CHECK-NEXT: Section: __data (2) Since the relocation is with a section, we print the seciton name and don't need to say that it is not scattered or external. Someone motivated can add further special cases for things like ARM64_RELOC_ADDEND and ARM_RELOC_PAIR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240073 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-18 22:38:20 +00:00
..
adrp-relocation.s
alias-logicalimm.s
arm64-adr.s
arm64-advsimd.s
arm64-aliases.s
arm64-arithmetic-encoding.s
arm64-arm64-fixup.s
arm64-basic-a64-instructions.s
arm64-be-datalayout.s
arm64-bitfield-encoding.s
arm64-branch-encoding.s
arm64-condbr-without-dots.s
arm64-crypto.s
arm64-diagno-predicate.s
arm64-diags.s
arm64-directive_loh.s
arm64-elf-reloc-condbr.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
arm64-elf-relocs.s
arm64-fp-encoding-error.s
arm64-fp-encoding.s
arm64-large-relocs.s
arm64-leaf-compact-unwind.s	Improve the --expand-relocs handling of MachO.	2015-06-18 22:38:20 +00:00
arm64-logical-encoding.s
arm64-mapping-across-sections.s
arm64-mapping-within-section.s
arm64-memory.s
arm64-nv-cond.s
arm64-optional-hash.s
arm64-separator.s
arm64-simd-ldst.s
arm64-small-data-fixups.s
arm64-spsel-sysreg.s
arm64-system-encoding.s
arm64-target-specific-sysreg.s
arm64-tls-modifiers-darwin.s
arm64-tls-relocs.s
arm64-v128_lo-diagnostics.s
arm64-variable-exprs.s
arm64-vector-lists.s
arm64-verbose-vector-case.s
armv8.1a-atomic.s	AArch64: fix typo in SMIN far atomics and add tests	2015-06-02 18:37:20 +00:00
armv8.1a-lor.s	[AArch64] LORID_EL1 register must be treated as read-only	2015-04-20 16:54:37 +00:00
armv8.1a-pan.s	[AArch64] Add v8.1a "Privileged Access Never" extension	2015-04-16 15:20:51 +00:00
armv8.1a-rdma.s
armv8.1a-vhe.s	[AArch64] Add v8.1a "Virtualization Host Extensions"	2015-04-16 15:38:58 +00:00
basic-a64-diagnostics.s	ARM]: Add support for MMFR4_EL1 in assembler	2015-06-08 15:01:11 +00:00
basic-a64-instructions.s	ARM]: Add support for MMFR4_EL1 in assembler	2015-06-08 15:01:11 +00:00
basic-pic.s
case-insen-reg-names.s	[AArch64] AsmParser should be case insensitive about accepting vector register names.	2015-06-08 21:32:16 +00:00
dot-req-case-insensitive.s
dot-req-diagnostics.s
dot-req.s
elf_osabi_flags.s
elf-extern.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-globaladdress.ll	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-objdump.s
elf-reloc-addsubimm.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-reloc-ldrlit.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-reloc-ldstunsimm.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-reloc-movw.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-reloc-pcreladdressing.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-reloc-tstb.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
elf-reloc-uncondbrimm.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
expr-shr.s	[MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.	2015-04-28 01:37:11 +00:00
gicv3-regs-diagnostics.s
gicv3-regs.s
inline-asm-modifiers.s
inst-directive-diagnostic.s
inst-directive.s	[AArch64] Clean up the ELF streamer a bit.	2015-05-23 16:39:10 +00:00
jump-table.s
ldr-pseudo-diagnostics.s
ldr-pseudo-obj-errors.s
ldr-pseudo.s
lit.local.cfg
mapping-across-sections.s
mapping-within-section.s
neon-2velem.s
neon-3vdiff.s
neon-aba-abd.s
neon-across.s
neon-add-pairwise.s
neon-add-sub-instructions.s
neon-bitwise-instructions.s
neon-compare-instructions.s
neon-crypto.s
neon-diagnostics.s
neon-extract.s
neon-facge-facgt.s
neon-frsqrt-frecp.s
neon-halving-add-sub.s
neon-max-min-pairwise.s
neon-max-min.s
neon-mla-mls-instructions.s
neon-mov.s
neon-mul-div-instructions.s
neon-perm.s
neon-rounding-halving-add.s
neon-rounding-shift.s
neon-saturating-add-sub.s
neon-saturating-rounding-shift.s
neon-saturating-shift.s
neon-scalar-abs.s
neon-scalar-add-sub.s
neon-scalar-by-elem-mla.s
neon-scalar-by-elem-mul.s
neon-scalar-by-elem-saturating-mla.s
neon-scalar-by-elem-saturating-mul.s
neon-scalar-compare.s
neon-scalar-cvt.s
neon-scalar-dup.s
neon-scalar-extract-narrow.s
neon-scalar-fp-compare.s
neon-scalar-mul.s
neon-scalar-neg.s
neon-scalar-recip.s
neon-scalar-reduce-pairwise.s
neon-scalar-rounding-shift.s
neon-scalar-saturating-add-sub.s
neon-scalar-saturating-rounding-shift.s
neon-scalar-saturating-shift.s
neon-scalar-shift-imm.s
neon-scalar-shift.s
neon-shift-left-long.s
neon-shift.s
neon-simd-copy.s
neon-simd-ldst-multi-elem.s
neon-simd-ldst-one-elem.s
neon-simd-misc.s
neon-simd-post-ldst-multi-elem.s
neon-simd-shift.s
neon-sxtl.s
neon-tbl.s
neon-uxtl.s
noneon-diagnostics.s
optional-hash.s
single-slash.s
tls-relocs.s	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
trace-regs-diagnostics.s
trace-regs.s