llvm-6502/include/llvm/Target
Sriram Murali 4d91232df1 test commit
- fix comments on vector type legalization



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192389 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 20:24:53 +00:00
..
CostTable.h Add a overload to CostTable which allows it to infer the size of the table. 2013-08-09 19:33:32 +00:00
Mangler.h Use proper section suffix for COFF weak symbols 2013-07-29 13:58:39 +00:00
Target.td Add an instruction deprecation feature to TableGen. 2013-09-12 10:28:05 +00:00
TargetCallingConv.h Remove unused, undefined ArgFlagsTy::getArgFlagsString; add a comment about 'returned' 2013-04-21 18:05:20 +00:00
TargetCallingConv.td Add an OtherPreserved field to the CalleeSaved TableGen class. 2013-08-23 02:25:47 +00:00
TargetFrameLowering.h [SystemZ] Clean up register scavenging code 2013-07-05 12:55:00 +00:00
TargetInstrInfo.h IfConverter: Use TargetSchedule for instruction latencies 2013-09-30 15:28:56 +00:00
TargetIntrinsicInfo.h Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION. 2012-09-17 06:59:23 +00:00
TargetItinerary.td I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
TargetJITInfo.h Sort the #include lines for the include/... tree with the script. 2012-12-03 17:02:12 +00:00
TargetLibraryInfo.h [SystemZ] Use SRST to optimize memchr 2013-08-20 09:38:48 +00:00
TargetLowering.h test commit 2013-10-10 20:24:53 +00:00
TargetLoweringObjectFile.h [DebugInfo] Allow getDebugThreadLocalSymbol to return MCExpr 2013-07-02 18:47:09 +00:00
TargetMachine.h Directly access objects which may change during compilation. 2013-06-17 20:41:25 +00:00
TargetOpcodes.h Fix grammar / missing words 2013-10-10 18:47:35 +00:00
TargetOptions.h Use function attributes to indicate that we don't want to realign the stack. 2013-08-01 21:42:05 +00:00
TargetRegisterInfo.h PrintVRegOrUnit 2013-08-23 17:48:53 +00:00
TargetSchedule.td Even more spelling fixes for "instruction". 2013-09-28 13:42:22 +00:00
TargetSelectionDAG.td Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions: 2013-09-04 09:28:24 +00:00
TargetSelectionDAGInfo.h [SystemZ] Use SRST to optimize memchr 2013-08-20 09:38:48 +00:00
TargetSubtargetInfo.h Added temp flag -misched-bench for staging in default changes. 2013-09-26 05:53:35 +00:00