..
AlignedBundling
3DNow.s
2011-09-06-NoNewline.s
address-size.s
[x86] Add basic support for .code16
2014-01-06 04:55:54 +00:00
avx512-encodings.s
AVX-512: Assembly parsing of broadcast semantic in AVX-512; imlemented by Nis Zinovy (zinovy.y.nis@intel.com)
2014-02-20 06:34:39 +00:00
cfi_def_cfa-crash.s
X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable()
2013-11-08 22:33:06 +00:00
fde-reloc.s
fixup-cpu-mode.s
Tests for mode switching
2014-01-28 23:13:30 +00:00
gnux32-dwarf-gen.s
index-operations.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
intel-syntax-2.s
intel-syntax-avx512.s
Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax.
2014-01-17 07:37:39 +00:00
intel-syntax-bitwise-ops.s
Update the X86 assembler for .intel_syntax to accept
2014-02-06 01:21:15 +00:00
intel-syntax-directional-label.s
Un-revert: the buildbot failure in LLVM on lld-x86_64-win7 had me with
2013-12-19 23:16:14 +00:00
intel-syntax-encoding.s
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
Update the X86 assembler for .intel_syntax to produce an error for invalid base
2014-01-23 22:34:42 +00:00
intel-syntax-invalid-scale.s
Update the X86 assembler for .intel_syntax to produce an error for invalid
2014-01-23 21:52:41 +00:00
intel-syntax.s
MC: Fix Intel assembly parser for [global + offset]
2014-03-04 00:33:17 +00:00
lit.local.cfg
padlock.s
Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
2014-02-19 08:25:02 +00:00
relax-insn.s
[x86] Do not relax PUSHi16 to PUSHi32 (PR18414)
2014-01-08 12:58:32 +00:00
ret.s
[x86] Support i386-*-*-code16 triple for emitting 16-bit code
2014-01-20 12:02:25 +00:00
shuffle-comments.s
stackmap-nops.ll
Grow the stackmap/patchpoint format to hold 64-bit IDs.
2013-12-13 18:37:10 +00:00
variant-diagnostics.s
MC: fix test locations/name
2014-01-26 22:55:02 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
2014-01-31 05:33:45 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s
Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.
2013-10-14 04:55:01 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
[x86] Fix signed relocations for i64i32imm operands
2014-01-30 22:20:41 +00:00
x86_64-sse4a.s
x86_64-tbm-encoding.s
Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
2014-01-31 05:33:45 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s
[x86] Make AsmParser validate registers for memory operands a bit better
2014-01-08 12:58:28 +00:00
x86_long_nop.s
x86_nop.s
Use -triple to fix the test on non-ELF hosts.
2013-11-25 20:46:18 +00:00
x86_operands.s
x86-16.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
x86-64.s
Recommit r201059 and r201060 with hopefully a fix for its original failure.
2014-02-10 06:55:41 +00:00
x86-target-directives.s
correct target directive handling error handling
2014-01-13 01:15:39 +00:00
