llvm-6502/lib/Target/Mips
Jakob Stoklund Olesen 600f171486 RISC architectures get their memory operand folding for free.
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108099 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 19:19:13 +00:00
..
AsmPrinter Remove the TargetRegisterClass member from CalleeSavedInfo 2010-06-02 20:02:30 +00:00
TargetInfo make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
CMakeLists.txt Add skeleton target-specific SelectionDAGInfo files. 2010-04-16 23:04:22 +00:00
Makefile make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
Mips.h
Mips.td Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
MipsCallingConv.td Fix return registers for mips eabi 2010-01-19 12:37:35 +00:00
MipsDelaySlotFiller.cpp
MipsInstrFormats.td
MipsInstrFPU.td the FPCmp node returns an i32. 2010-03-28 05:12:57 +00:00
MipsInstrInfo.cpp RISC architectures get their memory operand folding for free. 2010-07-11 19:19:13 +00:00
MipsInstrInfo.h RISC architectures get their memory operand folding for free. 2010-07-11 19:19:13 +00:00
MipsInstrInfo.td Remove isTwoAddress from Mips. 2010-06-21 20:19:21 +00:00
MipsISelDAGToDAG.cpp SubRegIndex'ize Mips 2010-05-24 17:42:58 +00:00
MipsISelLowering.cpp Split the SDValue out of OutputArg so that SelectionDAG-independent 2010-07-07 15:54:55 +00:00
MipsISelLowering.h Split the SDValue out of OutputArg so that SelectionDAG-independent 2010-07-07 15:54:55 +00:00
MipsMachineFunction.h Move per-function state out of TargetLowering subclasses and into 2010-04-17 14:41:14 +00:00
MipsMCAsmInfo.cpp Eliminate SetDirective, and replace it with HasSetDirective. 2010-01-26 20:40:54 +00:00
MipsMCAsmInfo.h revert 93934, removing the MCAsmInfo endianness bit. I can't 2010-01-20 06:34:14 +00:00
MipsRegisterInfo.cpp Remove the TargetRegisterClass member from CalleeSavedInfo 2010-06-02 20:02:30 +00:00
MipsRegisterInfo.h cleanup 2010-06-02 13:53:17 +00:00
MipsRegisterInfo.td Replace the SubRegSet tablegen class with a less error-prone mechanism. 2010-05-26 17:27:12 +00:00
MipsSchedule.td Make processor FUs unique for given itinerary. This extends the limit of 32 2010-04-18 20:31:01 +00:00
MipsSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsSelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsTargetMachine.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsTargetObjectFile.cpp delete a forwarding function. 2010-04-08 21:34:17 +00:00
MipsTargetObjectFile.h Move TLOF implementations to libCodegen to resolve layering violation. 2010-02-15 22:37:53 +00:00