llvm-6502/test/CodeGen
Scott Michel 52d0001cfc CellSPU:
- Remove custom lowering for BRCOND
- Add remaining functionality for branches in SPUInstrInfo, such as branch
  condition reversal and load/store folding. Updated BrCond test to reflect
  branch reversal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 00:27:53 +00:00
..
Alpha Correct some thinkos in the expansion of ADD/SUB 2008-11-12 08:23:26 +00:00
ARM Clean up some ARM GV asm printing out; minor fixes to match what gcc does. 2008-12-06 02:00:55 +00:00
CBackend Fix PR2907 by digging through constant expressions to find FP constants that 2008-10-22 04:53:16 +00:00
CellSPU CellSPU: 2009-01-03 00:27:53 +00:00
CPP Put CPPBackend tests into their own directory and run them only if they're 2008-07-10 22:35:32 +00:00
Generic Revert the changes in this testcase until Anton can fix them. 2008-12-24 05:23:34 +00:00
IA64 sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
Mips Fix PR2667: add soft float support for sint_to_fp/uint_to_fp 2008-11-10 17:36:26 +00:00
PowerPC rename a file to follow naming conventions. 2009-01-02 01:52:35 +00:00
SPARC Add testcase for 'r' inline asm operand 2008-10-10 20:28:59 +00:00
X86 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register. 2009-01-02 05:35:45 +00:00
XCore Add support for ISD::TRAP to the XCore backend 2008-12-03 10:59:16 +00:00