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llvm-6502/lib/Target/AArch64
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Nadav Rotem 97541d400e Optimize concat_vectors(X, undef) -> scalar_to_vector(X). 
This optimization is not SSE specific so I am moving it to DAGco.
The new scalar_to_vector dag node exposed a missing pattern in the AArch64 target that I needed to add.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-25 06:41:18 +00:00
..
AsmParser Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
Disassembler Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
InstPrinter Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
MCTargetDesc Add a MCAsmInfoELF class and factor some code into it. 2013-10-16 01:34:32 +00:00
TargetInfo
Utils Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64.h
AArch64.td
AArch64AsmPrinter.cpp AArch64: use RegisterOperand for NEON registers. 2013-09-13 07:26:52 +00:00
AArch64AsmPrinter.h
AArch64BranchFixupPass.cpp
AArch64CallingConv.td Initial support for Neon scalar instructions. 2013-09-24 02:47:27 +00:00
AArch64FrameLowering.cpp
AArch64FrameLowering.h
AArch64InstrFormats.td [AArch64] Add support for NEON scalar three register different instruction 2013-10-17 18:12:29 +00:00
AArch64InstrInfo.cpp Implement 3 AArch64 neon instructions : umov smov ins. 2013-09-17 02:21:02 +00:00
AArch64InstrInfo.h
AArch64InstrInfo.td Initial support for Neon scalar instructions. 2013-09-24 02:47:27 +00:00
AArch64InstrNEON.td Optimize concat_vectors(X, undef) -> scalar_to_vector(X). 2013-10-25 06:41:18 +00:00
AArch64ISelDAGToDAG.cpp Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64ISelLowering.cpp [AArch64] Fix NZCV reg live-in bug in F128CSEL codegen. 2013-10-24 08:28:24 +00:00
AArch64ISelLowering.h Implement aarch64 neon instruction set AdvSIMD (copy). 2013-10-11 02:33:55 +00:00
AArch64MachineFunctionInfo.cpp
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64Subtarget.cpp
AArch64Subtarget.h AArch64: enable MISched by default. 2013-10-09 07:53:57 +00:00
AArch64TargetMachine.cpp
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
CMakeLists.txt
LLVMBuild.txt
Makefile
README.txt

README.txt 

This file will contain changes that need to be made before AArch64 can become an
officially supported target. Currently a placeholder.