Duncan Sands 5bb11b89dd Fix PR3393, which amounts to a bug in the expensive ... checking logic. Rather than make the checking more complicated, I've tweaked some logic to make things conform to how the checking thought things ought to be, since this results in a simpler "mental model". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63048 91177308-0d34-0410-b5e6-96231b3b80d8		2009-01-26 21:54:18 +00:00
..
CallingConvLower.cpp
CMakeLists.txt
DAGCombiner.cpp	Take the next steps in making SDUse more consistent with LLVM Use, and	2009-01-26 04:35:06 +00:00
FastISel.cpp	Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.	2009-01-22 09:10:11 +00:00
LegalizeDAG.cpp	Fix an indent and a typo.	2009-01-24 22:12:48 +00:00
LegalizeFloatTypes.cpp	Cleanup whitespace and comments, and tweak some	2009-01-21 09:00:29 +00:00
LegalizeIntegerTypes.cpp	Cleanup whitespace and comments, and tweak some	2009-01-21 09:00:29 +00:00
LegalizeTypes.cpp	Fix PR3393, which amounts to a bug in the expensive	2009-01-26 21:54:18 +00:00
LegalizeTypes.h	Fix PR3393, which amounts to a bug in the expensive	2009-01-26 21:54:18 +00:00
LegalizeTypesGeneric.cpp
LegalizeVectorTypes.cpp
Makefile
ScheduleDAGFast.cpp
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodesEmit.cpp	Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.	2009-01-22 09:10:11 +00:00
SelectionDAG.cpp	Take the next steps in making SDUse more consistent with LLVM Use, and	2009-01-26 04:35:06 +00:00
SelectionDAGBuild.cpp	During bittest switch lowering emit shift in the test block, which should (theoretically)	2009-01-26 19:26:01 +00:00
SelectionDAGBuild.h
SelectionDAGISel.cpp	Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.	2009-01-20 19:12:24 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	Add SelectionDAG::getNOT method to construct bitwise NOT operations,	2009-01-22 17:39:32 +00:00