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AsmParser
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R600/SI: Add a stub GCNTargetMachine
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2015-01-06 18:00:21 +00:00 |
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InstPrinter
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[cleanup] Re-sort all the #include lines in LLVM using
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2015-01-14 11:23:27 +00:00 |
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MCTargetDesc
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Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
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2015-02-19 11:38:11 +00:00 |
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TargetInfo
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R600/SI: Add a stub GCNTargetMachine
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2015-01-06 18:00:21 +00:00 |
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AMDGPU.h
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[PM] Remove a bunch of stale TTI creation method declarations. I nuked
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2015-02-01 00:22:15 +00:00 |
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AMDGPU.td
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R600/SI: Set noNamedPositionallyEncodedOperands
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2015-02-18 02:15:32 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAsmPrinter.cpp
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Grab the subtarget off of the machine function for the R600
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2015-02-19 01:10:53 +00:00 |
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AMDGPUAsmPrinter.h
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Remove the DisasmEnabled AsmPrinter variable and just look it
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2015-02-19 01:10:49 +00:00 |
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AMDGPUCallingConv.td
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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Make helper functions/classes/globals static. NFC.
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2015-02-06 17:51:54 +00:00 |
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AMDGPUInstrInfo.h
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R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
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2015-02-03 17:37:57 +00:00 |
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AMDGPUInstrInfo.td
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R600/SI: Fix implicit vcc operand to v_div_fmas_*
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2015-02-14 04:22:00 +00:00 |
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AMDGPUInstructions.td
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R600/SI: Don't set isCodeGenOnly = 1 on all instructions
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2015-02-18 16:08:17 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
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R600/SI: Use complex operand folding for div_scale
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2015-02-14 04:24:28 +00:00 |
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AMDGPUISelLowering.cpp
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R600/SI: Fix implicit vcc operand to v_div_fmas_*
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2015-02-14 04:22:00 +00:00 |
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AMDGPUISelLowering.h
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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AMDGPUMachineFunction.cpp
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R600: Canonicalize access to function attributes, NFC
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2015-02-14 02:45:45 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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Grab the subtarget off of the machine function for the R600
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2015-02-19 01:10:53 +00:00 |
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AMDGPUMCInstLower.h
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R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
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2015-01-15 18:42:51 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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80-column fixups.
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2015-02-19 00:15:33 +00:00 |
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AMDGPUSubtarget.h
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R600/SI: Disable subreg liveness
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2015-02-11 18:24:53 +00:00 |
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AMDGPUTargetMachine.cpp
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[PM] Remove the old 'PassManager.h' header file at the top level of
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2015-02-13 10:01:29 +00:00 |
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AMDGPUTargetMachine.h
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R600: Split AMDGPUPassConfig into R600PassConfig and GCNPassConfig
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2015-02-11 17:11:51 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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R600/SI: Fix bug in TTI loop unrolling preferences
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2015-02-05 15:32:18 +00:00 |
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AMDGPUTargetTransformInfo.h
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[multiversion] Remove the function parameter from the unrolling
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2015-02-01 14:31:23 +00:00 |
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AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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CaymanInstructions.td
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R600/SI: Implement correct f64 fdiv
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2015-02-14 04:30:08 +00:00 |
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CIInstructions.td
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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CMakeLists.txt
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R600/SI: Spill VGPRs to scratch space for compute shaders
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2015-01-14 15:42:31 +00:00 |
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EvergreenInstructions.td
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R600/SI: Implement correct f64 fdiv
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2015-02-14 04:30:08 +00:00 |
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LLVMBuild.txt
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Makefile
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Processors.td
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R600/SI: Add subtarget feature for if f32 fma is fast
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2015-01-29 19:34:25 +00:00 |
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600InstrInfo.cpp
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R600InstrInfo.h
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R600Instructions.td
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R600/SI: Don't set isCodeGenOnly = 1 on all instructions
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2015-02-18 16:08:17 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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Prefer SmallVector::append/insert over push_back loops.
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2015-02-17 15:29:18 +00:00 |
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R600ISelLowering.h
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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Remove a few more calls to TargetMachine::getSubtarget from the
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2015-02-19 01:10:55 +00:00 |
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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R700Instructions.td
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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SIAnnotateControlFlow.cpp
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R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers
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2015-02-05 15:32:15 +00:00 |
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SIDefines.h
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R600/SI: Also enable WQM for image opcodes which calculate LOD v3
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2015-02-06 02:51:20 +00:00 |
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SIFixSGPRCopies.cpp
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R600/SI: Remove VReg_32 register class
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2015-01-07 20:59:25 +00:00 |
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SIFixSGPRLiveRanges.cpp
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SIFoldOperands.cpp
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R600/SI: Fix asam errors in SIFoldOperands
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2015-02-17 20:11:54 +00:00 |
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SIInsertWaits.cpp
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R600/SI: Fix dependency between instruction writing M0 and S_SENDMSG on VI (v2)
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2015-02-03 17:37:52 +00:00 |
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SIInstrFormats.td
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R600/SI: Fix READLANE and WRITELANE lane select for VI
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2015-02-18 22:12:45 +00:00 |
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SIInstrInfo.cpp
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R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C
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2015-02-18 22:12:41 +00:00 |
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SIInstrInfo.h
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R600/SI: Allow f64 inline immediates in i64 operands
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2015-02-13 19:05:03 +00:00 |
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SIInstrInfo.td
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R600/SI: Don't set isCodeGenOnly = 1 on all instructions
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2015-02-18 16:08:17 +00:00 |
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SIInstructions.td
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R600/SI: Fix READLANE and WRITELANE lane select for VI
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2015-02-18 22:12:45 +00:00 |
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SIIntrinsics.td
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SIISelLowering.cpp
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Prefer SmallVector::append/insert over push_back loops.
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2015-02-17 15:29:18 +00:00 |
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SIISelLowering.h
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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SILoadStoreOptimizer.cpp
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Reuse a bunch of cached subtargets and remove getSubtarget calls
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2015-01-30 23:24:40 +00:00 |
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SILowerControlFlow.cpp
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R600/SI: Don't enable WQM for V_INTERP_* instructions v2
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2015-02-06 02:51:25 +00:00 |
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SILowerI1Copies.cpp
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R600/SI: Remove VReg_32 register class
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2015-01-07 20:59:25 +00:00 |
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SIMachineFunctionInfo.cpp
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Remove a few more calls to TargetMachine::getSubtarget from the
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2015-02-19 01:10:55 +00:00 |
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SIMachineFunctionInfo.h
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R600/SI: Add subtarget feature to enable VGPR spilling for all shader types
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2015-01-20 19:33:04 +00:00 |
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SIPrepareScratchRegs.cpp
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R600/SI: Fix simple-loop.ll test
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2015-01-20 19:33:02 +00:00 |
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SIRegisterInfo.cpp
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R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2
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2015-02-03 17:37:57 +00:00 |
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SIRegisterInfo.h
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R600/SI: Define a schedule model and enable the generic machine scheduler
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2015-01-29 16:55:25 +00:00 |
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SIRegisterInfo.td
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R600/SI: Really fix size of VReg_1
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2015-02-14 03:54:32 +00:00 |
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SISchedule.td
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R600/SI: Define a schedule model
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2015-01-14 01:13:19 +00:00 |
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SIShrinkInstructions.cpp
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R600/SI: Allow f64 inline immediates in i64 operands
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2015-02-13 19:05:03 +00:00 |
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SITypeRewriter.cpp
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R600: Canonicalize access to function attributes, NFC
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2015-02-14 02:45:45 +00:00 |
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VIInstrFormats.td
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R600/SI: Rename dst encoding field to be consistent with docs
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2015-02-18 02:15:37 +00:00 |
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VIInstructions.td
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R600/SI: Add VI versions of MUBUF loads and stores
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2015-01-27 17:24:58 +00:00 |
