Jim Grosbach 4fd4c91c40 ARM: Allocation hints must make sure to be in the alloc order. ... When creating an allocation hint for a register pair, make sure the hint for the physical register reference is still in the allocation order. rdar://13240556 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175541 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-19 18:55:36 +00:00
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AArch64	AArch64: remove ConstantIsland pass & put literals in separate section.	2013-02-15 09:33:43 +00:00
ARM	ARM NEON: Merge a f32 bitcast of a v2i32 extractelt	2013-02-19 15:27:05 +00:00
CPP
Generic	For inline asm:	2013-01-11 18:12:39 +00:00
Hexagon	Hexagon: add support for predicate-GPR copies.	2013-02-13 22:56:34 +00:00
MBlaze
Mips	Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,	2013-02-19 03:56:57 +00:00
MSP430
NVPTX	[NVPTX] Disable vector registers	2013-02-12 14:18:49 +00:00
PowerPC	DAGCombiner: Constant folding around pre-increment loads/stores	2013-02-08 21:35:47 +00:00
R600	R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern	2013-02-18 14:11:28 +00:00
SI
SPARC
Thumb
Thumb2	ARM: Allocation hints must make sure to be in the alloc order.	2013-02-19 18:55:36 +00:00
X86	Fix typo	2013-02-19 17:11:48 +00:00
XCore