Andrea Di Biagio 6077ca9abb [DAGCombiner] teach how to simplify xor/and/or nodes according to the following rules: ... 1) (AND (shuf (A, C, Mask), shuf (B, C, Mask)) -> shuf (AND (A, B), C, Mask) 2) (OR (shuf (A, C, Mask), shuf (B, C, Mask)) -> shuf (OR (A, B), C, Mask) 3) (XOR (shuf (A, C, Mask), shuf (B, C, Mask)) -> shuf (XOR (A, B), V_0, Mask) 4) (AND (shuf (C, A, Mask), shuf (C, B, Mask)) -> shuf (C, AND (A, B), Mask) 5) (OR (shuf (C, A, Mask), shuf (C, B, Mask)) -> shuf (C, OR (A, B), Mask) 6) (XOR (shuf (C, A, Mask), shuf (C, B, Mask)) -> shuf (V_0, XOR (A, B), Mask) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204160 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-18 17:12:59 +00:00
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AArch64	Make DAGCombiner work on vector bitshifts with constant splat vectors.	2014-03-17 18:58:01 +00:00
ARM	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
MSP430
NVPTX	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
PowerPC	Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.	2014-03-18 14:32:50 +00:00
R600	CodeGen/R600/v_cndmask.ll: Relax an expression to unbreak msvcrt.	2014-03-18 06:17:22 +00:00
SPARC	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
SystemZ	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
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X86	[DAGCombiner] teach how to simplify xor/and/or nodes according to the following rules:	2014-03-18 17:12:59 +00:00
XCore	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00