llvm-6502/test/CodeGen
Jakob Stoklund Olesen 61396aebee Fix a batch of x86 tests to be coalescer independent.
Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 23:54:51 +00:00
..
Alpha
ARM Give this test an explicit register allocator, so that it can work even if 2011-05-04 23:14:02 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Un-XFAIL this test for ARM. <rdar://problem/7662569> 2011-04-20 21:47:45 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
Mips Remove LLVM IR metadata in test case committed in r130847. 2011-05-04 18:28:36 +00:00
MSP430 Fix register-dependent test in MSP430. 2011-05-04 01:01:39 +00:00
PowerPC FileCheckize and break dependence on coalescing order. 2011-05-04 19:02:01 +00:00
PTX PTX: support for bitwise operations on predicates 2011-04-28 00:19:51 +00:00
SPARC Fix more register and coalescing dependencies. 2011-05-04 19:02:11 +00:00
SystemZ
Thumb Fix more register and coalescing dependencies. 2011-05-04 19:02:11 +00:00
Thumb2 Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases. 2011-05-04 22:10:36 +00:00
X86 Fix a batch of x86 tests to be coalescer independent. 2011-05-04 23:54:51 +00:00
XCore Fix register-dependent XCore tests 2011-05-04 01:01:41 +00:00