llvm-6502/test/CodeGen
Akira Hatanaka 614051a1c5 Fix handling of double precision loads and stores when Mips1 is targeted.
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This 
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same 
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 03:51:51 +00:00
..
Alpha make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
ARM Fix this test to avoid leaving a temporary file behind. 2011-08-15 20:55:03 +00:00
Blackfin more tests not making the jump into the brave new world. 2011-07-09 16:57:10 +00:00
CBackend Revert r137134. It breaks some code as Eli pointed out. 2011-08-09 18:56:35 +00:00
CellSPU make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
CPP manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Generic Comment correction. 2011-07-12 03:39:22 +00:00
MBlaze
Mips Fix handling of double precision loads and stores when Mips1 is targeted. 2011-08-16 03:51:51 +00:00
MSP430
PowerPC Add MCObjectFileInfo and sink the MCSections initialization code from 2011-07-20 05:58:47 +00:00
PTX PTX: Add initial support for device function calls 2011-08-09 17:36:31 +00:00
SPARC make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
SystemZ manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Thumb Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
Thumb2 Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. 2011-08-08 19:49:37 +00:00
X86 Fix PR10656. It's only profitable to use 128-bit inserts and extracts 2011-08-15 21:45:54 +00:00
XCore Fix crash with varargs function with no named parameters. 2011-08-01 16:45:59 +00:00