Colin LeMahieu 6217146dce [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228010 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-03 19:15:11 +00:00
..
AArch64
ARM	ARM: further correct .fpu directive handling	2015-01-30 19:35:18 +00:00
AsmParser
COFF
Disassembler	[Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests.	2015-02-03 19:15:11 +00:00
ELF
Hexagon
MachO
Markup
Mips	[mips] Manually replace JAL pseudo-instructions with their JALR equivalent, instead of using InstAlias.	2015-01-30 11:18:50 +00:00
PowerPC
R600
Sparc
SystemZ
X86	[X86] Make fxsave64/fxrstor64/xsave64/xsrstor64/xsaveopt64 parseable in AT&T syntax. Also make them the default output.	2015-02-03 11:03:57 +00:00