Chad Rosier 7ae3bb83c2 [fast-isel] Add a preemptive fix for the case where we fail to materialize an ...

immediate in a register.  I don't believe this should ever fail, but I see no
harm in trying to make this code bullet proof.

I've added an assert to ensure my assumtion is correct.  If the assertion fires
something is wrong and we should fix it, rather then just silently fall back to
SelectionDAG isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178305 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-28 23:04:47 +00:00

..

CMakeLists.txt

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DAGCombiner.cpp

Enhance folding of (extract_subvec (insert_subvec V1, V2, IIdx), EIdx)

2013-03-25 23:47:35 +00:00

FastISel.cpp

[fast-isel] Add a preemptive fix for the case where we fail to materialize an

2013-03-28 23:04:47 +00:00

FunctionLoweringInfo.cpp

Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.

2013-02-08 20:35:15 +00:00

InstrEmitter.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

InstrEmitter.h

Use MachineInstrBuilder in InstrEmitter.

2012-12-20 18:08:09 +00:00

LegalizeDAG.cpp

Remove default from fully covered switch.

2013-03-08 17:03:19 +00:00

LegalizeFloatTypes.cpp

Set properties for f128 type.

2013-03-01 21:11:44 +00:00

LegalizeIntegerTypes.cpp

Fix PR10475

2013-03-01 18:40:30 +00:00

LegalizeTypes.cpp

Move SDNode order propagation to SDNodeOrdering, which also fixes a missed

2013-03-20 14:51:01 +00:00

LegalizeTypes.h

Move SDNode order propagation to SDNodeOrdering, which also fixes a missed

2013-03-20 14:51:01 +00:00

LegalizeTypesGeneric.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

LegalizeVectorOps.cpp

SelectionDAG compile time improvement.

2013-02-22 23:33:30 +00:00

LegalizeVectorTypes.cpp

SDAG: Handle scalarizing an extend of a <1 x iN> vector.

2013-03-07 05:47:54 +00:00

LLVMBuild.txt

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Makefile

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ResourcePriorityQueue.cpp

Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.

2012-12-13 06:34:11 +00:00

ScheduleDAGFast.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

ScheduleDAGRRList.cpp

Revert "pre-RA-sched: fix TargetOpcode usage"

2013-03-20 15:43:00 +00:00

ScheduleDAGSDNodes.cpp

Change TargetLowering::getRepRegClassFor to take an MVT, instead of

2012-12-13 18:45:35 +00:00

ScheduleDAGSDNodes.h

Fix #includes, so we include only what we really need.

2013-02-20 00:26:25 +00:00

ScheduleDAGVLIW.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

SDNodeDbgValue.h

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SDNodeOrdering.h

Make variable name more explicit and eliminate redundant lookup in SDNodeOrdering

2013-03-20 23:10:59 +00:00

SelectionDAG.cpp

When computing the demanded bits of Load SDNodes, make sure that we are looking at the loaded-value operand and not the ptr result (in case of pre-inc loads).

2013-03-20 22:53:44 +00:00

SelectionDAGBuilder.cpp

Remove the type legality check from the SelectionDAGBuilder when it lowers @llvm.fmuladd to ISD::FMA nodes.

2013-03-23 08:26:53 +00:00

SelectionDAGBuilder.h

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

SelectionDAGDumper.cpp

Teach SDISel to combine fsin / fcos into a fsincos node if the following

2013-01-29 02:32:37 +00:00

SelectionDAGISel.cpp

Move SDNode order propagation to SDNodeOrdering, which also fixes a missed

2013-03-20 14:51:01 +00:00

SelectionDAGPrinter.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

TargetLowering.cpp

Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration.

2013-02-12 21:21:59 +00:00

TargetSelectionDAGInfo.cpp

…