llvm-6502/test/CodeGen
Owen Anderson 654d5440a4 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 21:57:50 +00:00
..
Alpha
ARM Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 2010-09-28 21:57:50 +00:00
Blackfin
CBackend
CellSPU Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction. 2010-09-16 12:29:33 +00:00
CPP
Generic
MBlaze
Mips Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
MSP430 CombinerAA is now reordering these stores. 2010-09-20 20:56:29 +00:00
PIC16
PowerPC the latest assembler that runs on powerpc 10.4 machines doesn't 2010-09-27 06:44:54 +00:00
PTX Add test case for PTX ret instruction 2010-09-25 07:49:54 +00:00
SPARC
SystemZ Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
Thumb Revert "Disable codegen prepare critical edge splitting. Machine instruction passes now" 2010-09-27 18:43:48 +00:00
Thumb2 Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00
X86 Revert "Disable codegen prepare critical edge splitting. Machine instruction passes now" 2010-09-27 18:43:48 +00:00
XCore Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
thumb2-mul.ll Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00