Richard Sandiford 66589dcc8f Keep TBAA info when rewriting SelectionDAG loads and stores ... Most SelectionDAG code drops the TBAA info when creating a new form of a load and store (e.g. during legalization, or when converting a plain load to an extending one). This patch tries to catch all cases where the TBAA information can legitimately be carried over. The patch adds alternative forms of getLoad() and getExtLoad() that take a MachineMemOperand instead of individual fields. (The corresponding getTruncStore() already exists.) The idea is to use the MachineMemOperand forms when all fields are carried over (size, pointer info, isVolatile, isNonTemporal, alignment and TBAA info). If some adjustment is being made, e.g. to narrow the load, then we still pass the individual fields but also pass the TBAA info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193517 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-28 11:17:59 +00:00
..
PBQP
Analysis.h	[stackprotector] Refactor out the end of isInTailCallPosition into the function returnTypeIsEligibleForTailCall.	2013-08-20 08:36:50 +00:00
AsmPrinter.h	Formatting and whitespace.	2013-10-24 21:04:51 +00:00
CalcSpillWeights.h
CallingConvLower.h	Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.	2013-07-14 04:42:23 +00:00
CommandFlags.h	Speling fixes.	2013-10-22 15:18:03 +00:00
DAGCombine.h
DFAPacketizer.h
EdgeBundles.h
FastISel.h	Changed "mode: c++" => "C++" at the suggestion of Nick Lewycky.	2013-07-10 18:40:49 +00:00
FunctionLoweringInfo.h	Simplify landing pad lowering.	2013-07-04 04:53:45 +00:00
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h	[ARM] Use the load-acquire/store-release instructions optimally in AArch32.	2013-09-26 12:22:36 +00:00
JITCodeEmitter.h
LatencyPriorityQueue.h
LexicalScopes.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h	Print register in LiveInterval::print()	2013-10-10 21:29:05 +00:00
LiveIntervalAnalysis.h	Represent RegUnit liveness with LiveRange instance	2013-10-10 21:29:02 +00:00
LiveIntervalUnion.h	Rename LiveRange to LiveInterval::Segment	2013-10-10 21:28:43 +00:00
LiveRangeEdit.h	Auto-compute live intervals on demand.	2013-08-14 23:50:16 +00:00
LiveRegMatrix.h
LiveRegUnits.h	LiveRegUnits: Use *MBB for consistency and convenience.	2013-10-14 22:18:59 +00:00
LiveStackAnalysis.h
LiveVariables.h	Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.	2013-07-11 16:22:38 +00:00
MachineBasicBlock.h	Even more spelling fixes for "instruction".	2013-09-28 13:42:22 +00:00
MachineBlockFrequencyInfo.h
MachineBranchProbabilityInfo.h	Add editor C++ filetype declaration no functionality change.	2013-08-12 21:10:23 +00:00
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h	Rename parameter: defined regs are not incoming.	2013-10-10 21:28:38 +00:00
MachineInstrBuilder.h	Reapply an improved version of r180816/180817.	2013-07-09 20:28:37 +00:00
MachineInstrBundle.h
MachineJumpTableInfo.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h	Make a few more things const.	2013-08-15 20:25:44 +00:00
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachinePostDominators.h
MachineRegisterInfo.h	Add a convenient PSetIterator for visiting pressure sets affected by a register.	2013-08-23 17:48:46 +00:00
MachineRelocation.h	[typo] An LLVM.	2013-08-16 23:30:19 +00:00
MachineScheduler.h	Allow subtarget selection of the default MachineScheduler and document the interface.	2013-09-20 05:14:41 +00:00
MachineSSAUpdater.h
MachineTraceMetrics.h
MachORelocation.h
Passes.h	Simplify formatting and sort these. No functionality changed.	2013-10-15 02:03:44 +00:00
PseudoSourceValue.h	[typo] An LLVM.	2013-08-16 23:30:19 +00:00
RegAllocPBQP.h
RegAllocRegistry.h
RegisterClassInfo.h
RegisterPressure.h	Represent RegUnit liveness with LiveRange instance	2013-10-10 21:29:02 +00:00
RegisterScavenging.h	Use SmallVectorImpl::iterator/const_iterator instead of SmallVector	2013-07-03 05:01:24 +00:00
ResourcePriorityQueue.h
RuntimeLibcalls.h	LegalizeDAG: allow libcalls for max/min atomic operations	2013-10-25 09:30:20 +00:00
ScheduleDAG.h	Explicitly request unsigned enum types when desired	2013-10-08 20:15:11 +00:00
ScheduleDAGInstrs.h	Even more spelling fixes for "instruction".	2013-09-28 13:42:22 +00:00
ScheduleDFS.h
ScheduleHazardRecognizer.h
SchedulerRegistry.h
ScoreboardHazardRecognizer.h
SelectionDAG.h	Keep TBAA info when rewriting SelectionDAG loads and stores	2013-10-28 11:17:59 +00:00
SelectionDAGISel.h	Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.	2013-10-05 05:38:16 +00:00
SelectionDAGNodes.h	Remove an old workaround for a compiler that EOL'd years ago.	2013-09-29 19:39:02 +00:00
SlotIndexes.h	Down-scale slot index distance to save bits.	2013-07-30 19:59:19 +00:00
StackProtector.h	[stackprotector] Refactor the StackProtector pass from a single .cpp file into StackProtector.h and StackProtector.cpp.	2013-09-27 21:58:43 +00:00
TargetLoweringObjectFileImpl.h
TargetSchedule.h	IfConverter: Use TargetSchedule for instruction latencies	2013-09-30 15:28:56 +00:00
ValueTypes.h	Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).	2013-10-10 17:00:52 +00:00
ValueTypes.td	Implement aarch64 neon instruction set AdvSIMD (Across).	2013-10-05 08:22:10 +00:00
VirtRegMap.h