mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-19 01:34:32 +00:00
67c18d5034
top bit of a ValueType to be zero. Enforce this by ensuring an assertion failure if someone tries to create a ValueType without this property. I chose this minimal approach rather than a more official integration of the notion of reserved bits into ValueType because I'm hoping that the verifier will be changed to no longer require this :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43031 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
AsmPrinter.h | ||
CallingConvLower.h | ||
Collector.h | ||
CollectorMetadata.h | ||
Collectors.h | ||
DwarfWriter.h | ||
ELFRelocation.h | ||
FileWriters.h | ||
IntrinsicLowering.h | ||
LinkAllCodegenComponents.h | ||
LiveInterval.h | ||
LiveIntervalAnalysis.h | ||
LiveVariables.h | ||
MachineBasicBlock.h | ||
MachineCodeEmitter.h | ||
MachineConstantPool.h | ||
MachineFrameInfo.h | ||
MachineFunction.h | ||
MachineFunctionPass.h | ||
MachineInstr.h | ||
MachineInstrBuilder.h | ||
MachineJumpTableInfo.h | ||
MachineLocation.h | ||
MachineModuleInfo.h | ||
MachinePassRegistry.h | ||
MachineRelocation.h | ||
MachORelocation.h | ||
Passes.h | ||
RegAllocRegistry.h | ||
RegisterCoalescer.h | ||
RegisterScavenging.h | ||
RuntimeLibcalls.h | ||
SchedGraphCommon.h | ||
ScheduleDAG.h | ||
SchedulerRegistry.h | ||
SelectionDAG.h | ||
SelectionDAGISel.h | ||
SelectionDAGNodes.h | ||
SimpleRegisterCoalescing.h | ||
SSARegMap.h | ||
ValueTypes.h | ||
ValueTypes.td |