llvm-6502/test/CodeGen/Mips
Daniel Sanders 68138dc9a8 [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets.
Summary:
The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the
element size before use as an offset. The offset must therefore be a
multiple of the element size to be valid in these instructions. However,
an unaligned base address is valid in MSA.

This commit causes the compiler to emit valid code when the calculated
offset is not a multiple of the element size by accounting for the offset
using addiu and using a zero offset in the load/store.

Depends on D2338

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196777 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 12:47:12 +00:00
..
msa [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets. 2013-12-09 12:47:12 +00:00
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll
2008-07-29-icmp.ll
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-07-20-Switch.ll
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
2012-12-12-ExpandMemcpy.ll
2013-11-18-fp64-const0.ll [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0) 2013-11-18 13:12:43 +00:00
addc.ll
addi.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
addressing-mode.ll
align16.ll Cleaning up of prologue/epilogue code for Mips16. First step 2013-12-08 16:51:52 +00:00
alloca16.ll Cleaning up of prologue/epilogue code for Mips16. First step 2013-12-08 16:51:52 +00:00
alloca.ll
analyzebranch.ll
and1.ll
asm-large-immediate.ll
atomic.ll
atomicops.ll
beqzc1.ll Make all the conditional Mips 16 branches get initially set for the 2013-11-15 02:21:52 +00:00
beqzc.ll Make all the conditional Mips 16 branches get initially set for the 2013-11-15 02:21:52 +00:00
biggot.ll
blez_bgez.ll
blockaddr.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
br-jmp.ll
brconeq.ll
brconeqk.ll
brconeqz.ll
brconge.ll
brcongt.ll
brconle.ll
brconlt.ll
brconne.ll
brconnek.ll
brconnez.ll
brdelayslot.ll
brind.ll
brsize3.ll Take care of long short branch immediate instructions for mips16 in 2013-11-13 23:52:18 +00:00
brsize3a.ll Take care of long short branch immediate instructions for mips16 in 2013-11-13 23:52:18 +00:00
bswap.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
buildpairextractelementf64.ll
call-optimization.ll [mips] Fix test case. 2013-12-07 02:48:29 +00:00
check-noat.ll
ci2.ll Fix a funny bug I introduced during conversion of ARM constant islands to Mips. 2013-11-24 02:53:09 +00:00
cmov.ll [mips] Small code generation improvement for conditional operator (select) 2013-12-05 12:07:05 +00:00
cmplarge.ll
const1.ll
const4a.ll Update older test cases for latest patch. 2013-11-24 03:37:56 +00:00
const6.ll Update older test cases for latest patch. 2013-11-24 03:37:56 +00:00
const6a.ll Allow the code which returns the length for inline assembler to know 2013-11-13 04:37:52 +00:00
const-mult.ll
constantfp0.ll
cprestore.ll
ctlz.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
DbgValueOtherTargets.test
disable-tail-merge.ll
div_rem.ll
div.ll
divrem.ll
divu_remu.ll
divu.ll
double2int.ll
dsp-patterns-cmp-vselect.ll
dsp-patterns.ll
dsp-r1.ll
dsp-r2.ll
dsp-vec-load-store.ll
eh-dwarf-cfa.ll
eh-return32.ll
eh-return64.ll
eh.ll
emit-big-cst.ll
ex2.ll Cleaning up of prologue/epilogue code for Mips16. First step 2013-12-08 16:51:52 +00:00
extins.ll
f16abs.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
fabs.ll
fastcc.ll
fcopysign-f32-f64.ll
fcopysign.ll
fixdfsf.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
fmadd1.ll
fneg.ll
fp16instrinsmc.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
fp16mix.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
fp16static.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
fp-indexed-ls.ll
fp-spill-reload.ll
fpbr.ll
fpneeded.ll
fpnotneeded.ll Fix a bug related to constant islands for Mips16 and mips16/32 dual mode. 2013-11-26 20:38:40 +00:00
fptr2.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
frame-address.ll
frem.ll
global-address.ll
global-pointer-reg.ll
gpreg-lazy-binding.ll
gprestore.ll
helloworld.ll Cleaning up of prologue/epilogue code for Mips16. First step 2013-12-08 16:51:52 +00:00
hf1_body.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
hf16_1.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
hf16call32_body.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
hf16call32.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
hfptrcall.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
i32k.ll Check in conditional branches for constant islands. Still need to finish 2013-11-28 00:56:37 +00:00
i64arg.ll
imm.ll
indirectcall.ll
init-array.ll
inlineasm64.ll
inlineasm_constraint.ll
inlineasm-cnstrnt-bad-I-1.ll
inlineasm-cnstrnt-bad-J.ll
inlineasm-cnstrnt-bad-K.ll
inlineasm-cnstrnt-bad-L.ll
inlineasm-cnstrnt-bad-N.ll
inlineasm-cnstrnt-bad-O.ll
inlineasm-cnstrnt-bad-P.ll
inlineasm-cnstrnt-reg64.ll
inlineasm-cnstrnt-reg.ll
inlineasm-operand-code.ll
inlineasmmemop.ll
int-to-float-conversion.ll
internalfunc.ll
jtstat.ll
largefr1.ll Check in conditional branches for constant islands. Still need to finish 2013-11-28 00:56:37 +00:00
largeimm1.ll
largeimmprinting.ll
lazy-binding.ll
lb1.ll
lbu1.ll
lcb2.ll Check in conditional branches for constant islands. Still need to finish 2013-11-28 00:56:37 +00:00
lcb3c.ll Part 1 of 3 patches that completes very long conditional branches 2013-11-29 22:32:56 +00:00
lcb4a.ll final patch for very long conditional branches for mips16 constant islands. 2013-12-03 23:42:51 +00:00
lcb5.ll final patch for very long conditional branches for mips16 constant islands. 2013-12-03 23:42:51 +00:00
lh1.ll
lhu1.ll
lit.local.cfg
llcarry.ll
load-store-left-right.ll
longbranch.ll
machineverifier.ll
madd-msub.ll
mbrsize4a.ll Add, to constant islands, long jumps similar to ARM far branch. 2013-11-21 05:13:23 +00:00
memcpy.ll
mips16_32_1.ll
mips16_32_3.ll
mips16_32_4.ll
mips16_32_5.ll
mips16_32_6.ll
mips16_32_7.ll
mips16_32_8.ll
mips16_32_9.ll
mips16_32_10.ll
mips16_fpret.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
mips16ex.ll
mips16fpe.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
mips64-f128-call.ll
mips64-f128.ll
mips64-fp-indexed-ls.ll
mips64-libcall.ll
mips64-sret.ll
mips64countleading.ll
mips64directive.ll
mips64ext.ll
mips64extins.ll
mips64fpimm0.ll
mips64fpldst.ll
mips64imm.ll
mips64instrs.ll
mips64intldst.ll
mips64lea.ll
mips64load-store-left-right.ll
mips64muldiv.ll
mips64shift.ll
mipslopat.ll
misha.ll
mno-ldc1-sdc1.ll
mul.ll
mulll.ll
mulull.ll
neg1.ll
nomips16.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
not1.ll
null.ll
o32_cc_byval.ll
o32_cc_vararg.ll
o32_cc.ll [mips] Fix a bug in function CC_MipsO32_FP64. The second double precision 2013-11-12 22:16:18 +00:00
optimize-fp-math.ll
or1.ll
powif64_16.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
private.ll
ra-allocatable.ll
rdhwr-directives.ll
rem.ll
remat-immed-load.ll
remu.ll
return_address.ll
return-vector.ll
rotate.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
sb1.ll
sel1c.ll [mips] Small code generation improvement for conditional operator (select) 2013-12-05 12:07:05 +00:00
sel2c.ll [mips] Small code generation improvement for conditional operator (select) 2013-12-05 12:07:05 +00:00
select.ll
selectcc.ll
seleq.ll
seleqk.ll
selgek.ll
selgt.ll
selle.ll
selltk.ll
selne.ll
selnek.ll
selpat.ll
selTBteqzCmpi.ll
selTBtnezCmpi.ll
selTBtnezSlti.ll
setcc-se.ll
seteq.ll
seteqz.ll
setge.ll
setgek.ll
setle.ll
setlt.ll
setltk.ll
setne.ll
setuge.ll
setugt.ll
setule.ll
setult.ll
setultk.ll
sh1.ll
shift-parts.ll
simplebr.ll Change the default branch instruction to be the 16 bit variety for mips16. 2013-11-12 02:27:12 +00:00
sint-fp-store_pattern.ll
sitofp-selectcc-opt.ll
sll1.ll
sll2.ll
small-section-reserve-gp.ll
spill-copy-acreg.ll
sra1.ll
sra2.ll
srl1.ll
srl2.ll
stack-alignment.ll [mips] Partially revert r193641. Stack alignment should not be determined by 2013-11-11 21:49:03 +00:00
stackcoloring.ll
stacksize.ll
stchar.ll
stldst.ll
sub1.ll
sub2.ll
swzero.ll
tailcall.ll
tls16_2.ll
tls16.ll
tls-alias.ll
tls-models.ll
tls.ll
tnaked.ll
trap1.ll [Mips] Adjust float ABI settings in case of MIPS16 mode. 2013-11-19 12:20:17 +00:00
trap.ll
uitofp.ll
ul1.ll
unalignedload.ll
vector-load-store.ll
vector-setcc.ll
weak.ll
xor1.ll
zeroreg.ll