llvm-6502/test/CodeGen/AArch64/arm64-fast-isel-store.ll
Juergen Ributzka 78f686d37c Reapply [FastISel][AArch64] Make use of the zero register when possible (r215591).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.

Original commit message:
This change materializes now the value "0" from the zero register.
The zero register can be folded by several instruction, so no
materialization is need at all.

Fixes <rdar://problem/17924413>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 19:44:02 +00:00

31 lines
661 B
LLVM

; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-unknown-unknown -fast-isel -fast-isel-abort < %s | FileCheck %s
define void @store_i8(i8* %a) {
; CHECK-LABEL: store_i8
; CHECK: strb wzr, [x0]
store i8 0, i8* %a
ret void
}
define void @store_i16(i16* %a) {
; CHECK-LABEL: store_i16
; CHECK: strh wzr, [x0]
store i16 0, i16* %a
ret void
}
define void @store_i32(i32* %a) {
; CHECK-LABEL: store_i32
; CHECK: str wzr, [x0]
store i32 0, i32* %a
ret void
}
define void @store_i64(i64* %a) {
; CHECK-LABEL: store_i64
; CHECK: str xzr, [x0]
store i64 0, i64* %a
ret void
}