.. |
InstPrinter
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MCTargetDesc
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TargetInfo
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AMDGPU.h
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R600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14 23:24:45 +00:00 |
AMDGPU.td
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AMDGPUAsmPrinter.cpp
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AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
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R600/SI: Fix an obvious typo
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2013-08-14 22:22:03 +00:00 |
AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUIndirectAddressing.cpp
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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AMDGPUInstructions.td
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
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R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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2013-08-16 01:11:55 +00:00 |
AMDGPUISelLowering.cpp
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R600/SI: Improve legalization of vector operations
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2013-08-14 23:25:00 +00:00 |
AMDGPUISelLowering.h
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R600/SI: Improve legalization of vector operations
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2013-08-14 23:25:00 +00:00 |
AMDGPUMachineFunction.cpp
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Move string pointer from being a static class member to just a static global in the one file its needed in.
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2013-07-17 00:31:35 +00:00 |
AMDGPUMachineFunction.h
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Move string pointer from being a static class member to just a static global in the one file its needed in.
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2013-07-17 00:31:35 +00:00 |
AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPURegisterInfo.cpp
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
AMDGPURegisterInfo.h
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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AMDGPUSubtarget.h
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AMDGPUTargetMachine.cpp
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R600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14 23:24:45 +00:00 |
AMDGPUTargetMachine.h
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SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
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2013-07-27 00:01:07 +00:00 |
AMDGPUTargetTransformInfo.cpp
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SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
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2013-07-27 00:01:07 +00:00 |
AMDILBase.td
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AMDILCFGStructurizer.cpp
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R600: Remove predicated_break inst
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2013-07-31 19:31:14 +00:00 |
AMDILInstrInfo.td
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AMDILIntrinsicInfo.cpp
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AMDILIntrinsicInfo.h
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AMDILIntrinsics.td
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AMDILISelLowering.cpp
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Make some arrays 'static const'
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2013-07-15 06:39:13 +00:00 |
AMDILRegisterInfo.td
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CMakeLists.txt
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R600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14 23:24:45 +00:00 |
LLVMBuild.txt
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Makefile
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Processors.td
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R600ControlFlowFinalizer.cpp
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
R600Defines.h
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
R600EmitClauseMarkers.cpp
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Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
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2013-07-14 04:42:23 +00:00 |
R600ExpandSpecialInstrs.cpp
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R600: Remove predicated_break inst
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2013-07-31 19:31:14 +00:00 |
R600InstrFormats.td
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
R600InstrInfo.cpp
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
R600InstrInfo.h
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
R600Instructions.td
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
R600Intrinsics.td
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R600ISelLowering.cpp
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R600: Set scheduling preference to Sched::Source
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2013-08-12 22:33:21 +00:00 |
R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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Revert "R600: Non vector only instruction can be scheduled on trans unit"
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2013-07-31 20:43:27 +00:00 |
R600MachineScheduler.h
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Revert "R600: Non vector only instruction can be scheduled on trans unit"
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2013-07-31 20:43:27 +00:00 |
R600OptimizeVectorRegisters.cpp
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R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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2013-08-16 01:11:55 +00:00 |
R600Packetizer.cpp
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Revert "R600: Non vector only instruction can be scheduled on trans unit"
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2013-07-31 20:43:27 +00:00 |
R600RegisterInfo.cpp
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
R600RegisterInfo.h
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
R600RegisterInfo.td
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R600: Add 64-bit float load/store support
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2013-08-01 15:23:42 +00:00 |
R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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Fix spelling
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2013-08-15 23:11:03 +00:00 |
SIAnnotateControlFlow.cpp
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Add 'const' qualifiers to static const char* variables.
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2013-07-16 01:17:10 +00:00 |
SIDefines.h
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R600/SI: Assign a register class to the $vaddr operand for MIMG instructions
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2013-08-14 23:24:17 +00:00 |
SIFixSGPRCopies.cpp
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R600/SI: Use VSrc_* register classes as the default classes for types
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2013-08-06 23:08:28 +00:00 |
SIInsertWaits.cpp
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Initialize SIInsertWaits::ExpInstrTypesSeen in the pass constructor.
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2013-08-07 07:47:41 +00:00 |
SIInstrFormats.td
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R600/SI: Assign a register class to the $vaddr operand for MIMG instructions
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2013-08-14 23:24:17 +00:00 |
SIInstrInfo.cpp
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R600/SI: Assign a register class to the $vaddr operand for MIMG instructions
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2013-08-14 23:24:17 +00:00 |
SIInstrInfo.h
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R600/SI: Assign a register class to the $vaddr operand for MIMG instructions
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2013-08-14 23:24:17 +00:00 |
SIInstrInfo.td
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R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
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2013-08-14 23:24:53 +00:00 |
SIInstructions.td
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R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
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2013-08-14 23:24:53 +00:00 |
SIIntrinsics.td
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R600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14 23:24:45 +00:00 |
SIISelLowering.cpp
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R600/SI: Improve legalization of vector operations
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2013-08-14 23:25:00 +00:00 |
SIISelLowering.h
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R600/SI: Improve legalization of vector operations
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2013-08-14 23:25:00 +00:00 |
SILowerControlFlow.cpp
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
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R600/SI: Choose the correct MOV instruction for copying immediates
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2013-08-14 23:24:24 +00:00 |
SIRegisterInfo.h
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R600/SI: Choose the correct MOV instruction for copying immediates
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2013-08-14 23:24:24 +00:00 |
SIRegisterInfo.td
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R600/SI: Convert v16i8 resource descriptors to i128
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2013-08-14 23:24:45 +00:00 |
SISchedule.td
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SITypeRewriter.cpp
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R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
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2013-08-14 23:24:53 +00:00 |