llvm-6502/lib/Target/Mips
Andrew Trick 061efcfb3e TargetPassConfig: confine the MC configuration to TargetMachine.
Passes prior to instructon selection are now split into separate configurable stages.
Header dependencies are simplified.
The bulk of this diff is simply removal of the silly DisableVerify flags.

Sorry for the target header churn. Attempting to stabilize them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-04 02:56:59 +00:00
..
AsmParser Add the skeleton of an asm parser for mips. 2012-01-11 03:56:41 +00:00
InstPrinter Tidy up. Simplify logic. No functional change intended. 2011-12-19 19:52:25 +00:00
MCTargetDesc Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
TargetInfo LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
CMakeLists.txt Target/Mips: Unbreak CMake build. 2012-01-25 03:15:46 +00:00
LLVMBuild.txt Add the skeleton of an asm parser for mips. 2012-01-11 03:56:41 +00:00
Makefile Add the skeleton of an asm parser for mips. 2012-01-11 03:56:41 +00:00
Mips64InstrInfo.td Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. 2012-01-25 03:01:35 +00:00
Mips.h
Mips.td Add definition of WSBH (Word Swap Bytes within Halfwords), which is an 2011-12-20 23:47:44 +00:00
MipsAnalyzeImmediate.cpp Add class MipsAnalyzeImmediate which comes up with an instruction sequence to 2012-01-25 01:43:36 +00:00
MipsAnalyzeImmediate.h MipsAnalyzeImmediate.h: Fix to add DataTypes.h for msvc. 2012-01-25 03:34:41 +00:00
MipsAsmPrinter.cpp Cleanup Mips code and rename some variables. Patch by Jack Carter 2011-12-30 21:09:41 +00:00
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand. 2012-01-24 18:37:29 +00:00
MipsCondMov.td
MipsDelaySlotFiller.cpp Tidy up. Simplify logic. No functional change intended. 2011-12-19 19:52:25 +00:00
MipsEmitGPRestore.cpp
MipsExpandPseudo.cpp
MipsFrameLowering.cpp Mark 64-bit register RA_64 unused too. 2012-01-25 04:19:22 +00:00
MipsFrameLowering.h
MipsInstrFormats.td
MipsInstrFPU.td Pattern for f32 to i64 conversion. 2012-01-24 22:05:25 +00:00
MipsInstrInfo.cpp Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
MipsInstrInfo.h Emit B (unconditional branch) when -relocation-model=pic and J (jump) when 2011-12-12 22:39:35 +00:00
MipsInstrInfo.td 64-bit sign extension in register instructions. 2012-01-24 21:41:09 +00:00
MipsISelDAGToDAG.cpp Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. 2012-01-25 03:01:35 +00:00
MipsISelLowering.cpp Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
MipsISelLowering.h Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
MipsJITInfo.cpp Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly. 2012-01-16 23:24:27 +00:00
MipsJITInfo.h
MipsMachineFunction.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsMachineFunction.h Remove VectorExtras. This unused helper was written for a type of API that is discouraged now. 2012-01-07 19:42:13 +00:00
MipsMCInstLower.cpp Ignore register mask operands when lowering instructions to MC. 2012-01-18 23:52:19 +00:00
MipsMCInstLower.h Expand .cprestore directive to multiple instructions if the offset does not fit 2011-12-13 03:09:05 +00:00
MipsRegisterInfo.cpp Modify MipsRegisterInfo::eliminateFrameIndex to use MipsAnalyzeImmediate to 2012-01-25 03:55:10 +00:00
MipsRegisterInfo.h
MipsRegisterInfo.td Add DWARF numbers of 64-bit registers. 2012-02-02 02:56:14 +00:00
MipsRelocations.h Improve Mips JIT. 2011-12-30 21:04:30 +00:00
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsSubtarget.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MipsTargetMachine.cpp TargetPassConfig: confine the MC configuration to TargetMachine. 2012-02-04 02:56:59 +00:00
MipsTargetMachine.h TargetPassConfig: confine the MC configuration to TargetMachine. 2012-02-04 02:56:59 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h