Benjamin Kramer 6fac1fbf30 DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible. ... This pattern occurs in SROA output due to the way vector arguments are lowered on ARM. The testcase from PR15525 now compiles into this, which is better than the code we got with the old scalarrepl: _Store: ldr.w r9, [sp] vmov d17, r3, r9 vmov d16, r1, r2 vst1.8 {d16, d17}, [r0] bx lr Differential Revision: http://llvm-reviews.chandlerc.com/D647 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179106 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-09 17:41:43 +00:00
..
CMakeLists.txt
DAGCombiner.cpp	DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible.	2013-04-09 17:41:43 +00:00
FastISel.cpp	[fast-isel] Add a preemptive fix for the case where we fail to materialize an	2013-03-28 23:04:47 +00:00
FunctionLoweringInfo.cpp	Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.	2013-02-08 20:35:15 +00:00
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp	Remove default from fully covered switch.	2013-03-08 17:03:19 +00:00
LegalizeFloatTypes.cpp	Fix PR15632: No support for ppcf128 floating-point remainder on PowerPC.	2013-04-03 13:05:44 +00:00
LegalizeIntegerTypes.cpp	Formatting	2013-04-04 18:03:41 +00:00
LegalizeTypes.cpp	Move SDNode order propagation to SDNodeOrdering, which also fixes a missed	2013-03-20 14:51:01 +00:00
LegalizeTypes.h	Fix PR15632: No support for ppcf128 floating-point remainder on PowerPC.	2013-04-03 13:05:44 +00:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp	SelectionDAG compile time improvement.	2013-02-22 23:33:30 +00:00
LegalizeVectorTypes.cpp	SDAG: Handle scalarizing an extend of a <1 x iN> vector.	2013-03-07 05:47:54 +00:00
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp	Revert "pre-RA-sched: fix TargetOpcode usage"	2013-03-20 15:43:00 +00:00
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h	Fix #includes, so we include only what we really need.	2013-02-20 00:26:25 +00:00
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SDNodeOrdering.h	Make variable name more explicit and eliminate redundant lookup in SDNodeOrdering	2013-03-20 23:10:59 +00:00
SelectionDAG.cpp	When computing the demanded bits of Load SDNodes, make sure that we are looking at the loaded-value operand and not the ptr result (in case of pre-inc loads).	2013-03-20 22:53:44 +00:00
SelectionDAGBuilder.cpp	Remove the type legality check from the SelectionDAGBuilder when it lowers @llvm.fmuladd to ISD::FMA nodes.	2013-03-23 08:26:53 +00:00
SelectionDAGBuilder.h
SelectionDAGDumper.cpp	Teach SDISel to combine fsin / fcos into a fsincos node if the following	2013-01-29 02:32:37 +00:00
SelectionDAGISel.cpp	Move SDNode order propagation to SDNodeOrdering, which also fixes a missed	2013-03-20 14:51:01 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration.	2013-02-12 21:21:59 +00:00
TargetSelectionDAGInfo.cpp