Matt Arsenault e0e503801f R600: Add a testcase for sext_in_reg I missed. ... This sext_inreg i32 in i64 case was already handled, but not enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204840 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-26 18:31:06 +00:00
..
InstPrinter	Make methods static	2014-03-17 22:23:09 +00:00
MCTargetDesc	Fix missing C++ mode comment	2014-03-06 17:33:58 +00:00
TargetInfo	Prune redundant dependencies in LLVMBuild.txt.	2013-12-11 00:30:57 +00:00
AMDGPU.h	Fix known typos	2014-01-24 17:20:08 +00:00
AMDGPU.td	R600: Recommit 199842: Add work-around for the CF stack entry HW bug	2014-01-23 16:18:02 +00:00
AMDGPUAsmPrinter.cpp	R600/SI: Use correct dest register class for V_READFIRSTLANE_B32	2014-03-17 17:03:51 +00:00
AMDGPUAsmPrinter.h	Add a default constructor to get deterministic behavior.	2013-12-05 16:21:17 +00:00
AMDGPUCallingConv.td
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp	R600: Take alignment into account when calculating the stack offset	2014-01-22 19:24:23 +00:00
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	Fix indentation	2014-03-11 00:01:27 +00:00
AMDGPUInstrInfo.h	R600/SI: Implement spilling of SGPRs v5	2013-11-27 21:23:35 +00:00
AMDGPUInstrInfo.td	R600: Match sign_extend_inreg to BFE instructions	2014-03-17 18:58:11 +00:00
AMDGPUInstructions.td	R600: Reorganize tablegen instruction definitions	2014-03-24 16:07:25 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp	[Modules] Move ValueMap to the IR library. While this class does not	2014-03-04 11:26:31 +00:00
AMDGPUISelLowering.cpp	R600: Add a testcase for sext_in_reg I missed.	2014-03-26 18:31:06 +00:00
AMDGPUISelLowering.h	R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cpp	2014-03-25 18:18:27 +00:00
AMDGPUMachineFunction.cpp	[weak vtables] Remove a bunch of weak vtables	2013-11-19 00:57:56 +00:00
AMDGPUMachineFunction.h	[weak vtables] Remove a bunch of weak vtables	2013-11-19 00:57:56 +00:00
AMDGPUMCInstLower.cpp	R600: Verify all instructions in the AsmPrinter on debug builds	2014-02-28 21:36:41 +00:00
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp	Use llvm_unreachable instead of assert(0)	2013-12-10 21:37:42 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	R600: Recommit 199842: Add work-around for the CF stack entry HW bug	2014-01-23 16:18:02 +00:00
AMDGPUSubtarget.h	R600: Match sign_extend_inreg to BFE instructions	2014-03-17 18:58:11 +00:00
AMDGPUTargetMachine.cpp	R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()	2014-03-21 15:51:57 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp	[TTI] There is actually no realistic way to pop TTI implementations off	2014-03-10 02:45:14 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp	R600: Don't viewCFG() under DEBUG() except on failure.	2014-03-24 20:29:02 +00:00
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td	R600: Match sign_extend_inreg to BFE instructions	2014-03-17 18:58:11 +00:00
AMDILISelLowering.cpp	R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cpp	2014-03-25 18:18:27 +00:00
AMDILRegisterInfo.td
CaymanInstructions.td	R600: Reorganize tablegen instruction definitions	2014-03-24 16:07:25 +00:00
CMakeLists.txt	[CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.	2013-11-28 17:04:31 +00:00
EvergreenInstructions.td	R600: Reorganize tablegen instruction definitions	2014-03-24 16:07:25 +00:00
LLVMBuild.txt	Add proper dependencies to LLVMBuild.txt in llvm/lib.	2013-12-10 05:39:34 +00:00
Makefile
Processors.td	R600: Recommit 199842: Add work-around for the CF stack entry HW bug	2014-01-23 16:18:02 +00:00
R600ClauseMergePass.cpp	Fix known typos	2014-01-24 17:20:08 +00:00
R600ControlFlowFinalizer.cpp	R600: Correctly handle vertex fetch clauses the precede ENDIFs	2014-01-23 18:49:31 +00:00
R600Defines.h	Fix known typos	2014-01-24 17:20:08 +00:00
R600EmitClauseMarkers.cpp	R600: Register R600EmitClauseMarkers pass	2013-12-11 17:51:41 +00:00
R600ExpandSpecialInstrs.cpp	[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.	2014-03-02 12:27:27 +00:00
R600InstrFormats.td
R600InstrInfo.cpp	[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.	2014-03-02 12:27:27 +00:00
R600InstrInfo.h	Fix known typos	2014-01-24 17:20:08 +00:00
R600Instructions.td	R600: Reorganize tablegen instruction definitions	2014-03-24 16:07:25 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600: Match sign_extend_inreg to BFE instructions	2014-03-17 18:58:11 +00:00
R600ISelLowering.h	Fix known typos	2014-01-24 17:20:08 +00:00
R600MachineFunctionInfo.cpp	[weak vtables] Remove a bunch of weak vtables	2013-11-19 00:57:56 +00:00
R600MachineFunctionInfo.h	[weak vtables] Remove a bunch of weak vtables	2013-11-19 00:57:56 +00:00
R600MachineScheduler.cpp	Factor MI-Sched in preparation for post-ra scheduling support.	2013-12-28 21:56:47 +00:00
R600MachineScheduler.h	Factor MI-Sched in preparation for post-ra scheduling support.	2013-12-28 21:56:47 +00:00
R600OptimizeVectorRegisters.cpp	Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing	2014-03-13 23:12:04 +00:00
R600Packetizer.cpp	[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.	2014-03-02 12:27:27 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp	[Layering] Move InstVisitor.h into the IR library as it is pretty	2014-03-06 03:23:41 +00:00
R700Instructions.td	R600: Reorganize tablegen instruction definitions	2014-03-24 16:07:25 +00:00
SIAnnotateControlFlow.cpp	Add DEBUG_TYPE to SIAnnotateControlFlow	2014-02-03 22:58:05 +00:00
SIDefines.h
SIFixSGPRCopies.cpp	Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing	2014-03-13 23:12:04 +00:00
SIInsertWaits.cpp	R600/SI: Add intrinsic for S_SENDMSG instruction	2014-01-27 07:20:44 +00:00
SIInstrFormats.td	R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()	2014-03-21 15:51:57 +00:00
SIInstrInfo.cpp	R600/SI: Fix extra mov from legalizing 64-bit SALU ops.	2014-03-24 20:08:13 +00:00
SIInstrInfo.h	R600/SI: Sub-optimial fix for 64-bit immediates with SALU ops.	2014-03-24 20:08:09 +00:00
SIInstrInfo.td	R600/SI: Add unused LDS 2 form instructions.	2014-03-19 22:19:56 +00:00
SIInstructions.td	R600/SI: Fix 64-bit bit ops that require the VALU.	2014-03-24 20:08:05 +00:00
SIIntrinsics.td	R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions	2014-01-27 07:20:51 +00:00
SIISelLowering.cpp	R600/SI: Fix 64-bit private loads.	2014-03-24 17:50:46 +00:00
SIISelLowering.h	R600/SI: Custom select 64-bit ADD	2014-02-25 21:36:18 +00:00
SILowerControlFlow.cpp	R600/SI: Use correct dest register class for V_READFIRSTLANE_B32	2014-03-17 17:03:51 +00:00
SIMachineFunctionInfo.cpp	R600/SI: Implement spilling of SGPRs v5	2013-11-27 21:23:35 +00:00
SIMachineFunctionInfo.h	R600/SI: Implement spilling of SGPRs v5	2013-11-27 21:23:35 +00:00
SIRegisterInfo.cpp	Fix known typos	2014-01-24 17:20:08 +00:00
SIRegisterInfo.h
SIRegisterInfo.td	R600/SI: Use correct dest register class for V_READFIRSTLANE_B32	2014-03-17 17:03:51 +00:00
SISchedule.td
SITypeRewriter.cpp	[Layering] Move InstVisitor.h into the IR library as it is pretty	2014-03-06 03:23:41 +00:00