llvm-6502/test/CodeGen
Jack Carter 37ef65b9c1 This patch that sets the EmitAlias flag in td files
and enables the instruction printer to print aliased 
instructions. 

Due to usage of RegisterOperands a change in common 
code (utils/TableGen/AsmWriterEmitter.cpp) is required 
to get the correct register value if it is a RegisterOperand.

Contributer: Vladimir Medic
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 08:32:10 +00:00
..
AArch64 When the target-independent DAGCombiner inferred a higher alignment for a load, 2013-02-05 06:25:30 +00:00
ARM [Stack Alignment] emit warning instead of a hard error 2013-02-04 23:45:08 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Hexagon: Add V4 combine instructions and some more Def Pats for V2. 2013-02-04 15:52:56 +00:00
MBlaze
Mips This patch that sets the EmitAlias flag in td files 2013-02-05 08:32:10 +00:00
MSP430 Add support for varargs functions for msp430. 2012-11-21 17:28:27 +00:00
NVPTX [NVPTX] Fix crash with unnamed struct arguments 2012-12-05 20:50:28 +00:00
PowerPC Disable a couple more vector splat optimizations on PPC. 2013-02-04 15:52:32 +00:00
R600 R600: Fold clamp, neg, abs 2013-01-31 22:11:54 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Use the 'count' attribute to calculate the upper bound of an array. 2012-12-04 21:34:03 +00:00
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 When the target-independent DAGCombiner inferred a higher alignment for a load, 2013-02-05 06:25:30 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00