Richard Sandiford 396e080b34 [SystemZ] Fix incorrect use of RISBG for a zero-extended right shift ... We would wrongly transform the testcase into the equivalent of an AND with 1. The problem was that, when testing whether the shifted-in bits of the right shift were significant, we used the width of the final zero-extended result rather than the width of the shifted value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195731 91177308-0d34-0410-b5e6-96231b3b80d8		2013-11-26 10:53:16 +00:00
..
AArch64	Refactored the implementation of AArch64 NEON instruction ZIP, UZP	2013-11-26 03:26:47 +00:00
ARM	[ARM] Enable FeatureMP for Cortex-A5 by default.	2013-11-25 13:17:15 +00:00
CPP
Generic	Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions."	2013-11-21 10:55:15 +00:00
Hexagon	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Inputs	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Mips	Fixed tryFoldToZero() for vector types that need expansion.	2013-11-25 11:14:43 +00:00
MSP430
NVPTX	[NVPTX] Fix handling of indirect calls	2013-11-15 12:30:04 +00:00
PowerPC	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
R600	R600/SI: Fixing handling of condition codes	2013-11-22 23:07:58 +00:00
SPARC	[Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64.	2013-11-24 20:23:25 +00:00
SystemZ	[SystemZ] Fix incorrect use of RISBG for a zero-extended right shift	2013-11-26 10:53:16 +00:00
Thumb	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Thumb2
X86	StackMap: Implement support for DirectMemRefOp.	2013-11-26 02:03:25 +00:00
XCore	Error if we see an alias to a declaration.	2013-11-14 13:58:06 +00:00